From: Frank Li <frank.li@nxp.com> To: Will Deacon <will@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com>, Zhi Li <lznuaa@gmail.com>, Shenwei Wang <shenwei.wang@nxp.com>, Han Xu <han.xu@nxp.com>, Nitin Garg <nitin.garg@nxp.com>, Jason Liu <jason.hui.liu@nxp.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: RE: [EXT] Re: The problem about arm64: io: Relax implicit barriers in default I/O accessors Date: Thu, 22 Jul 2021 19:14:19 +0000 [thread overview] Message-ID: <AS8PR04MB850048A35E12270B42448B4C88E49@AS8PR04MB8500.eurprd04.prod.outlook.com> (raw) In-Reply-To: <AS8PR04MB8500635E829B332A61AC85C988129@AS8PR04MB8500.eurprd04.prod.outlook.com> > -----Original Message----- > From: Frank Li > Sent: Thursday, July 15, 2021 10:54 AM > To: Will Deacon <will@kernel.org> > Cc: Catalin Marinas <catalin.marinas@arm.com>; Zhi Li <lznuaa@gmail.com>; > Shenwei Wang <shenwei.wang@nxp.com>; Han Xu <han.xu@nxp.com>; Nitin Garg > <nitin.garg@nxp.com>; Jason Liu <jason.hui.liu@nxp.com>; linux-arm- > kernel@lists.infradead.org > Subject: RE: [EXT] Re: The problem about arm64: io: Relax implicit barriers > in default I/O accessors > > > > > -----Original Message----- > > From: Will Deacon <will@kernel.org> > > Sent: Tuesday, July 6, 2021 12:11 PM > > To: Frank Li <frank.li@nxp.com> > > Cc: Catalin Marinas <catalin.marinas@arm.com>; Zhi Li <lznuaa@gmail.com>; > > Shenwei Wang <shenwei.wang@nxp.com>; Han Xu <han.xu@nxp.com>; Nitin Garg > > <nitin.garg@nxp.com>; Jason Liu <jason.hui.liu@nxp.com>; linux-arm- > > kernel@lists.infradead.org > > Subject: Re: [EXT] Re: The problem about arm64: io: Relax implicit > barriers > > in default I/O accessors > > > > Caution: EXT Email > > > > Hi Frank, > > > > On Wed, Jun 23, 2021 at 03:48:10PM +0000, Frank Li wrote: > > > > I think you had a support case open with Arm [1] which I'm not able > to > > > > access -- please can you ask them about the two examples above? > > > > > > Still not get feedback from ARM. > > > > Just wondering if you were able to solve this without the need to change > > Linux? > > Sorry for late reply > > For CCI-500 and 550, ARM removed support for barrier transactions but CCI- > 400 supports barrier transactions. With CCI-400 it is a valid configuration > to have SYSBARDISABLE LOW in Cortex-A processors. This change in Linux > kernel is assuming that the SYSBARDISABLE is set to HIGH hence its not > correct change for all products having various versions of ARM CCI IP. > > Frank Li Deacon: Did you plan fix this problem by changing dma_wmb()? Frank Li > > > > > Cheers, > > > > Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-07-22 19:16 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <AS8PR04MB850004639EE6CE9432BBF13E880F9@AS8PR04MB8500.eurprd04.prod.outlook.com> [not found] ` <CAHrpEqRsp2_bt=p5JgS5F-2F_LCwgT+VX7mSENzpEYTQiW1tjg@mail.gmail.com> 2021-06-17 9:27 ` Catalin Marinas 2021-06-17 17:25 ` Will Deacon 2021-06-17 17:41 ` Will Deacon 2021-06-17 20:11 ` [EXT] " Frank Li 2021-06-17 21:40 ` Will Deacon 2021-06-17 22:13 ` Frank Li 2021-06-18 14:56 ` Nitin Garg 2021-06-21 16:11 ` Frank Li 2021-06-21 16:26 ` Will Deacon 2021-06-21 16:59 ` Will Deacon 2021-06-21 17:56 ` Frank Li 2021-06-21 18:13 ` Will Deacon 2021-06-21 21:32 ` Frank Li 2021-06-22 9:11 ` Will Deacon 2021-06-23 15:48 ` Frank Li 2021-07-06 17:11 ` Will Deacon 2021-07-15 15:53 ` Frank Li 2021-07-22 19:14 ` Frank Li [this message] 2021-08-09 13:50 ` Will Deacon 2021-08-09 14:46 ` Frank Li 2021-08-09 15:26 ` Will Deacon 2021-08-10 18:50 ` Frank Li
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