From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=0.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, HK_RANDOM_FROM,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85C88C43613 for ; Thu, 20 Jun 2019 10:06:34 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 155BB2147A for ; Thu, 20 Jun 2019 10:06:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 155BB2147A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id F209B1D0D9; Thu, 20 Jun 2019 12:06:32 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 56D4B1D0C9 for ; Thu, 20 Jun 2019 12:06:31 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Jun 2019 03:06:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,396,1557212400"; d="scan'208";a="335450305" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga005.jf.intel.com with ESMTP; 20 Jun 2019 03:06:30 -0700 Received: from fmsmsx157.amr.corp.intel.com (10.18.116.73) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 20 Jun 2019 03:06:29 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX157.amr.corp.intel.com (10.18.116.73) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 20 Jun 2019 03:06:29 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.87]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.225]) with mapi id 14.03.0439.000; Thu, 20 Jun 2019 18:06:27 +0800 From: "Li, Xiaoyun" To: "Wu, Jingjing" , "Wiles, Keith" , "Liang, Cunming" , "Maslekar, Omkar" CC: "dev@dpdk.org" Thread-Topic: [PATCH v6 3/6] raw/ntb: add handshake process Thread-Index: AQHVJXs1YB2m28n7aU2IM6/oTblDcqahDs4AgANEXJA= Date: Thu, 20 Jun 2019 10:06:26 +0000 Message-ID: References: <20190614021940.78631-1-xiaoyun.li@intel.com> <20190618021055.12709-1-xiaoyun.li@intel.com> <20190618021055.12709-4-xiaoyun.li@intel.com> <9BB6961774997848B5B42BEC655768F81145FE7B@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <9BB6961774997848B5B42BEC655768F81145FE7B@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v6 3/6] raw/ntb: add handshake process X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Thanks for comments for patch 1 & 2. Will refine them in the coming v7. And > -----Original Message----- > From: Wu, Jingjing > Sent: Wednesday, June 19, 2019 00:08 > To: Li, Xiaoyun ; Wiles, Keith ; > Liang, Cunming ; Maslekar, Omkar > > Cc: dev@dpdk.org > Subject: RE: [PATCH v6 3/6] raw/ntb: add handshake process >=20 > >mw_size[mw_idx]); >=20 > If the memzone is reserved inside of driver, how is the buffer be mapped = without > copy when enqueuer/dequeuer as the buffer might not be in the memzone? > How about to design the dev_config to set the mw to be a memzone (might > address + size) which can be created by application instead of created in= ternally? This is a temporary function to verify the memory w/r works and to suit the= hw limitation. There is no fifo right now. Will add the whole process of pkt mbuf pool cre= ate and aligned memzone allocation in next release. >=20 > > + db_bits =3D (*hw->ntb_ops->db_read)(dev); > > + if (!db_bits) > > + NTB_LOG(ERR, "No doorbells"); > > + >=20 > Is the db_bits a common setting between different kind of NTB? Yes. >=20 > [......] > > + /* Init doorbell. */ > > + hw->db_valid_mask =3D ((uint64_t)1 << hw->db_cnt) - 1; > Use RTE_LEN2MASK instead? Sure. Thx. >=20 > Thanks > Jingjing