Re: [PATCH v3 0/6] Introduce Intel FPGA BUS

["Zhang, Tianfei" <tianfei.zhang@intel.com>]

> -----Original Message-----
> From: Gaëtan Rivet [mailto:gaetan.rivet@6wind.com]
> Sent: Wednesday, March 28, 2018 6:18 AM
> To: Xu, Rosen <rosen.xu@intel.com>
> Cc: dev@dpdk.org; Doherty, Declan <declan.doherty@intel.com>;
> Richardson, Bruce <bruce.richardson@intel.com>; shreyansh.jain@nxp.com;
> Zhang, Tianfei <tianfei.zhang@intel.com>; Wu, Hao <hao.wu@intel.com>
> Subject: Re: [PATCH v3 0/6] Introduce Intel FPGA BUS
> 
> Hi Rosen,
> 
> On Wed, Mar 28, 2018 at 05:29:50PM +0800, Rosen Xu wrote:
> > Intel FPGA BUS in DPDK
> > -------------------------
> >
> > This patch set introduces Intel FPGA BUS support in DPDK.
> >
> > v3 updates:
> > ===========
> >  - Remove all modifications of bus scan and probe
> >  - FPGA BUS Scan is trigged by hotplug of Rawdev
> >  - Took Modifications of comments
> >  - Move AFU Device to IFPGA
> >  - FPGA BUS Scan depend on it¡¯s IFPGA Rawdev
> >  - Add Build Macros for FPGA BUS and IFPGA Rawdev
> >
> > Questions
> > =========
> > Why not PCI Bus?
> > All of the AFUs of one FPGA may share same PCI BDF.
> > Why not vdev Bus?
> > Because AFUs depend on Rawdev, and it's hardware specpic.
> >
> > Motivation
> > ==========
> > FPGA is used more and more widely in Cloud and NFV, one primary reason
> > is that FPGA not only provide ASIC performance but also it's more
> > flexible than ASIC. FPGA use Partial Reconfigure(PR) Parts of
> > Bitstream to achieve its flexibility. Another reason is that one FPGA
> > can be shared by different Users, and each User can use some of AFUs of
> One FPGA.
> >
> > That means One FPGA Device Bitstream is divided into many Parts of
> > Bitstream(each Part of Bitstream is defined as AFU-Accelerated
> > Function Unit), and each AFU is a Hardware Acceleration Unit and it
> > can dynamically Reload respectively.
> >
> > Proposed Solution
> > =================
> >  - Involve Rawdev to take FPGA Partial Configuration(Download/PR)
> >  - Defined FPGA-BUS for Acceleration Drivers of AFUs
> >    - FPGA PCI Scan(1st Scan) follows DPDK UIO/VFIO PCI Scan Process,
> >      probe Intel FPGA Rawdev Driver. FPGA-BUS scan is called, but AFU
> >      depend on Rawdev, so this scan doesn't trig AFU device create.
> >    - AFU Scan(2nd Scan) bind DPDK Driver to FPGA Partial-Bitstream.
> >      This scan is trigged by hotplug of IFPGA Rawdev probe, in this
> >      scan the AFUs will be created and their dirves are also probed.
> >
> > Scope
> > =====
> > The Intel FPGA BUS implementation is target towards various FPGA
> > Devices use PR to provide many Acceleration Function. Specific PMDs
> > may also bind to its AFU. And Applications don't care they are using
> > ASIC Acceleration or FPGA AFU Acceleration.
> >
> >
> > Status
> > =====
> > With integrating Intel PSG FPGA Software Stack OPAE(Open Programmable
> > Acceleration Engine) Share Code, Intel FPGA BUS runs well in Intel PSG
> > FPGA Cards.
> >
> 
> Which compiler did you use and in which version? With GCC 6.3 I got these
> errors:

We build it on Ubuntu 16.04 and RHEL 7.4, the compiler is : GCC 5.4 and GCC 4.8.5.
We will check the GCC 6.3 later.

> 
> == Build drivers/raw/ifpga_rawdev
>   CC skeleton_rawdev.o
>   CC skeleton_rawdev_test.o
>   CC ifpga_api.o
>   CC ifpga_enumerate.o
> /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_enumerat
> e.c: In function ‘parse_feature_afus’:
> /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_enumerat
> e.c:334:3: error: this ‘if’ clause does not guard...
> [-Werror=misleading-indentation]
>    if (feature_is_UAFU(binfo))
>    ^~
> /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_enumerat
> e.c:336:4: note: ...this statement, but the latter is misleadinglyindented as if
> it is guarded by the ‘if’
>     if (ret)
>     ^~
>   CC ifpga_feature_dev.o
> /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_feature_d
> ev.c: In function ‘port_hw_init’:
> /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_feature_d
> ev.c:272:3: error: this ‘if’ clause does not guard...
> [-Werror=misleading-indentation]
>    if (feature->ops && feature->ops->init)
>    ^~
> /home/rivet/dev/dpdk.org/drivers/raw/ifpga_rawdev/base/ifpga_feature_d
> ev.c:274:4: note: ...this statement, but the latter is misleadingly indented as
> if it is guarded by the ‘if’
>     if (ret) {
>     ^~
> cc1: all warnings being treated as errors


> 
> --
> Gaëtan Rivet
> 6WIND