From mboxrd@z Thu Jan  1 00:00:00 1970
From: zhangfei gao <zhangfei.gao@gmail.com>
Subject: Re: MMC runtime PM patches break libertas probe
Date: Fri, 10 Jun 2011 10:02:31 +0800
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To: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Bing Zhao <bzhao@marvell.com>, Daniel Drake <dsd@laptop.org>, "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>, Mike Rapoport <mike@compulab.co.il>, Zhangfei Gao <zgao6@marvell.com>

On Wed, Jun 8, 2011 at 10:34 PM, Ohad Ben-Cohen <ohad@wizery.com> wrote:
> Hi Bing,
>
> On Sat, Jun 4, 2011 at 1:52 AM, Ohad Ben-Cohen <ohad@wizery.com> wrote:
>> On Sat, Jun 4, 2011 at 1:28 AM, Bing Zhao <bzhao@marvell.com> wrote:
>>> "CMD5 Arg=0" refers to the very first CMD5 sent from host during initialization sequence.
>>> This is required because our state machine always expects two CMD5 from host (5, 5, 3, 7, ...).
>>
>> Great, thanks for confirming this !
>
> I have another question please.
>
> Does the sd8686 require an SDIO I/O reset (CMD52 setting bit 3 of
> address 0x6 of the CCCR) to it after powering it on ?
>
> Daniel (cc'ed) is trying to power it off and back on, and it does seem
> to work in the first time, without sending a reset. In the second
> time, though, the card doesn't answer CMD5 anymore, unless Daniel is
> sending it an SDIO I/O reset. I was wondering whether this is an
> sd8686 requirement, or whether we have some other issue at hand.

Hi, Ohad

Here is answer got from the sd8686 maintainer.

For 8686, the SDIO state machine can only handle init sequence (CMD5,
5, 3, 7) from host once. If host sends another init sequence, it will
not be able to handle CMD5 and causes the SDIO block to hang. Chips
that are newer than 8686 will be able to handle multiple init sequence
from host.

So yes, for 8686, an IO reset is needed before host can send a new set
of init sequence.


>
> Thanks,
> Ohad.
>