Re: PCI BAR1 Unassigned

[Bjorn Helgaas <bhelgaas@google.com>]

[-- Attachment #1: Type: text/plain, Size: 450 bytes --]

On Thu, May 26, 2011 at 2:38 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> Jan, would you mind testing the attached patch?  This is against
> current upstream, but I think it will apply without much trouble to
> 2.6.35; I don't think there have been many changes in that area.
> Thanks.

Hi Jan,

If you haven't tested the patch yet, can you substitute this one?  It
should be functionally equivalent, but I did tweak it a bit.

Bjorn

[-- Attachment #2: patch.pci2 --]
[-- Type: application/octet-stream, Size: 3938 bytes --]

commit 58a1058140c745c27961e5a297e44d274d611a6c
Author: Bjorn Helgaas <bhelgaas@google.com>
Date:   Tue May 24 06:48:22 2011 -0600

    PCI: pass pci_dev to decode_bar() for use in dev_warn()
    
    Pass pci_dev pointer do decode_bar() for future use in warning messages.
    
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 48849ff..8e1e4e5 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -100,7 +100,8 @@ static u64 pci_size(u64 base, u64 maxbase, u64 mask)
 	return size;
 }
 
-static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
+static inline enum pci_bar_type decode_bar(struct pci_dev *dev,
+					   struct resource *res, u32 bar)
 {
 	if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
 		res->flags = bar & ~PCI_BASE_ADDRESS_IO_MASK;
@@ -164,7 +165,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 		l = 0;
 
 	if (type == pci_bar_unknown) {
-		type = decode_bar(res, l);
+		type = decode_bar(dev, res, l);
 		res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
 		if (type == pci_bar_io) {
 			l &= PCI_BASE_ADDRESS_IO_MASK;
commit 12b53398a9b0508b6a65a138adf6ba54a36f32e5
Author: Bjorn Helgaas <bhelgaas@google.com>
Date:   Fri May 20 08:36:30 2011 -0600

    PCI: treat mem BAR type "11" (reserved) as 32-bit, not 64-bit, BAR
    
    The low four bits of a memory BAR are "PTT0" where P=1 for prefetchable
    BARs, and TT is as follows:
    
      00  32-bit BAR, anywhere in lower 4GB
      01  anywhere below 1MB (reserved as of PCI 2.2)
      10  64-bit BAR
      11  reserved
    
    Prior to e354597cce, we treated "0100" as a 64-bit BAR and all others as
    32-bit BARs.  This was obviously wrong because prefetchable 64-bit BARs
    ("1100") were treated as 32-bit BARs.
    
    The e354597cce fix, which appeared in 2.6.28, was to treat "x1x0" as 64-bit
    BARs, but this changed (probably unintentionally) our handling of reserved
    type "x110" from 32-bit to 64-bit.
    
    Hardware should not be using the "11" type, but if it did happen to use it
    for a 32-bit BAR, it worked before e354597cce and didn't work afterwards.
    Jan has a piece of such hardware.
    
    This patch returns to treating the reserved "11" type as a 32-bit BAR and
    adds a warning if we see it.
    
    It also logs a note if we see a 1M BAR.  This is not a warning, because
    such hardware conforms to pre-PCI 2.2 spec, but I think it's worth noting
    because Linux ignores the 1M restriction if it ever has to assign the BAR.
    
    CC: Peter Chubb <peterc@gelato.unsw.edu.au>
    Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=35952
    Reported-by: Jan Zwiegers <jan@radicalsystems.co.za>
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 8e1e4e5..f3ac096 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -103,6 +103,8 @@ static u64 pci_size(u64 base, u64 maxbase, u64 mask)
 static inline enum pci_bar_type decode_bar(struct pci_dev *dev,
 					   struct resource *res, u32 bar)
 {
+	u32 mem_type;
+
 	if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
 		res->flags = bar & ~PCI_BASE_ADDRESS_IO_MASK;
 		return pci_bar_io;
@@ -110,8 +112,21 @@ static inline enum pci_bar_type decode_bar(struct pci_dev *dev,
 
 	res->flags = bar & ~PCI_BASE_ADDRESS_MEM_MASK;
 
-	if (res->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
+	mem_type = bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
+	switch (mem_type) {
+	case PCI_BASE_ADDRESS_MEM_TYPE_32:
+		break;
+	case PCI_BASE_ADDRESS_MEM_TYPE_1M:
+		dev_info(&dev->dev, "1M mem BAR treated as 32-bit BAR\n");
+		break;
+	case PCI_BASE_ADDRESS_MEM_TYPE_64:
 		return pci_bar_mem64;
+	default:
+		dev_warn(&dev->dev,
+			 "mem unknown type %x treated as 32-bit BAR\n",
+			 mem_type);
+		break;
+	}
 	return pci_bar_mem32;
 }