diff for duplicates of <BANLkTi=rc5vZm3xAXHpHSxSH1wBWKhv92A@mail.gmail.com>
diff --git a/a/1.txt b/N1/1.txt
index 4bfcb97..591088b 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,15 +1,17 @@
Damnit Mikey, just after I hit send on [V2].....
On Thu, May 19, 2011 at 4:36 PM, Michael Neuling <mikey@neuling.org> wrote:
-> In message <BANLkTimKhApFW8G1-pG0u_9Kv2YB0R1O0w@mail.gmail.com> you wrote:
->> On Thu, May 19, 2011 at 12:58 AM, Michael Neuling <mikey@neuling.org> wrote=
+> In message <BANLkTimKhApFW8G1-pG0u_9Kv2YB0R1O0w@mail.gmail.com> you wrote=
+:
+>> On Thu, May 19, 2011 at 12:58 AM, Michael Neuling <mikey@neuling.org> wr=
+ote=3D
>> :
>> > Eric,
>> >
>> >> This patch adds save/restore register support for the BlueGene/P
>> >> double hummer FPU.
>> >
->> > What does this mean? =A0Needs more details here.
+>> > What does this mean? =3DA0Needs more details here.
>> >
okay, I've changed it a bit in [V2], if you want more I can do my best.
@@ -17,22 +19,23 @@ okay, I've changed it a bit in [V2], if you want more I can do my best.
>> "Each of the two FPU units contains 32 64-bit floating point registers
>> for a total of 64 FP registers per processor." which would seem to
>> point to the kittyhawk version - but they have a second SAVE_32SFPRS
->> for the second hummer. What wasn't clear to me with this version of
+>> for the second hummer. =A0What wasn't clear to me with this version of
>> the code was whether or not they were doing something clever like
>> saving the pair of the 64-bit FPU registers in a single 128-bit slot
>> (seems plausible).
>
> Ok, sounds like there is 32*8*2 bytes of data, rather than the normal
-> 32*8 bytes for FP only (ignoring VSX). If this is the case, then you'll
+> 32*8 bytes for FP only (ignoring VSX). =A0If this is the case, then you'l=
+l
> need make 'fpr' in the thread struct bigger which you can do by setting
-> TS_FPRWIDTH = 2 like we do for VSX.
+> TS_FPRWIDTH =3D 2 like we do for VSX.
>
Okay, I'll incorporate that into [V3].
> If there is some instruction that saves and restores two of these at a
> time (which LFPDX/STFPDX might I guess), then we can use that, otherwise
-> we'll have to do 64 saves/restores. Double load/stores will be faster
+> we'll have to do 64 saves/restores. =A0Double load/stores will be faster
> I'm guessing though.
I assume that's true.
@@ -59,7 +62,8 @@ I don't believe so.
Kittyhawk version can be seen here:
-http://git.kernel.org/?p=linux/kernel/git/ericvh/bluegene.git;a=commitdiff;h=94bffe786324b9bd07187b11afd836e3ec362d95
+http://git.kernel.org/?p=3Dlinux/kernel/git/ericvh/bluegene.git;a=3Dcommitd=
+iff;h=3D94bffe786324b9bd07187b11afd836e3ec362d95
>
> The most useful thing would be to see the instruction definition for
@@ -69,36 +73,40 @@ http://git.kernel.org/?p=linux/kernel/git/ericvh/bluegene.git;a=commitdiff;h=94b
https://wiki.alcf.anl.gov/images/d/d9/PPC440_FP2_arch.pdf
>>
->> >> =A0/*
->> >> diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms=
+>> >> =3DA0/*
+>> >> diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platfo=
+rms=3D
>> /44x/
>> > Kconfig
>> >> index f485fc5f..24a515e 100644
>> >> --- a/arch/powerpc/platforms/44x/Kconfig
>> >> +++ b/arch/powerpc/platforms/44x/Kconfig
>> >> @@ -169,6 +169,15 @@ config YOSEMITE
->> >> =A0 =A0 =A0 help
->> >> =A0 =A0 =A0 =A0 This option enables support for the AMCC PPC440EP evalua=
+>> >> =3DA0 =3DA0 =3DA0 help
+>> >> =3DA0 =3DA0 =3DA0 =3DA0 This option enables support for the AMCC PPC4=
+40EP evalua=3D
>> tion board.
>> >>
->> >> +config =A0 =A0 =A0 BGP
+>> >> +config =3DA0 =3DA0 =3DA0 BGP
>> >
->> > Does this FPU feature have a specific name like double hammer? =A0I'd
+>> > Does this FPU feature have a specific name like double hammer? =3DA0I'=
+d
>> > rather have the BGP defconfig depend on PPC_FPU_DOUBLE_HUMMER, or
>> > something like that...
>> >
->> >> + =A0 =A0 bool "Blue Gene/P"
->> >> + =A0 =A0 depends on 44x
->> >> + =A0 =A0 default n
->> >> + =A0 =A0 select PPC_FPU
->> >> + =A0 =A0 select PPC_DOUBLE_FPU
+>> >> + =3DA0 =3DA0 bool "Blue Gene/P"
+>> >> + =3DA0 =3DA0 depends on 44x
+>> >> + =3DA0 =3DA0 default n
+>> >> + =3DA0 =3DA0 select PPC_FPU
+>> >> + =3DA0 =3DA0 select PPC_DOUBLE_FPU
>> >
>> > ... in fact, it seem you are doing something like these here but you
>> > don't use PPC_DOUBLE_FPU anywhere?
>> >
>>
->> A fair point. I'm fine with calling it DOUBLE_HUMMER, but I wasn't sure if
->> that was "too internal" of a name for the kernel. Let me know and
+>> A fair point. =A0I'm fine with calling it DOUBLE_HUMMER, but I wasn't su=
+re if
+>> that was "too internal" of a name for the kernel. =A0Let me know and
>> I'll fix it up.
>
> What I'm mostly concerned about is disassociating it with a particular
diff --git a/a/content_digest b/N1/content_digest
index 5fd7a17..1f4ab1f 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -26,8 +26,8 @@
"To\0Michael Neuling <mikey\@neuling.org>\0"
]
[
- "Cc\0linux-kernel\@vger.kernel.org",
- " linuxppc-dev\@lists.ozlabs.org",
+ "Cc\0linuxppc-dev\@lists.ozlabs.org",
+ " linux-kernel\@vger.kernel.org",
" bg-linux\@lists.anl-external.org\0"
]
[
@@ -40,15 +40,17 @@
"Damnit Mikey, just after I hit send on [V2].....\n",
"\n",
"On Thu, May 19, 2011 at 4:36 PM, Michael Neuling <mikey\@neuling.org> wrote:\n",
- "> In message <BANLkTimKhApFW8G1-pG0u_9Kv2YB0R1O0w\@mail.gmail.com> you wrote:\n",
- ">> On Thu, May 19, 2011 at 12:58 AM, Michael Neuling <mikey\@neuling.org> wrote=\n",
+ "> In message <BANLkTimKhApFW8G1-pG0u_9Kv2YB0R1O0w\@mail.gmail.com> you wrote=\n",
+ ":\n",
+ ">> On Thu, May 19, 2011 at 12:58 AM, Michael Neuling <mikey\@neuling.org> wr=\n",
+ "ote=3D\n",
">> :\n",
">> > Eric,\n",
">> >\n",
">> >> This patch adds save/restore register support for the BlueGene/P\n",
">> >> double hummer FPU.\n",
">> >\n",
- ">> > What does this mean? =A0Needs more details here.\n",
+ ">> > What does this mean? =3DA0Needs more details here.\n",
">> >\n",
"\n",
"okay, I've changed it a bit in [V2], if you want more I can do my best.\n",
@@ -56,22 +58,23 @@
">> \"Each of the two FPU units contains 32 64-bit floating point registers\n",
">> for a total of 64 FP registers per processor.\" which would seem to\n",
">> point to the kittyhawk version - but they have a second SAVE_32SFPRS\n",
- ">> for the second hummer. \302\240What wasn't clear to me with this version of\n",
+ ">> for the second hummer. =A0What wasn't clear to me with this version of\n",
">> the code was whether or not they were doing something clever like\n",
">> saving the pair of the 64-bit FPU registers in a single 128-bit slot\n",
">> (seems plausible).\n",
">\n",
"> Ok, sounds like there is 32*8*2 bytes of data, rather than the normal\n",
- "> 32*8 bytes for FP only (ignoring VSX). \302\240If this is the case, then you'll\n",
+ "> 32*8 bytes for FP only (ignoring VSX). =A0If this is the case, then you'l=\n",
+ "l\n",
"> need make 'fpr' in the thread struct bigger which you can do by setting\n",
- "> TS_FPRWIDTH = 2 like we do for VSX.\n",
+ "> TS_FPRWIDTH =3D 2 like we do for VSX.\n",
">\n",
"\n",
"Okay, I'll incorporate that into [V3].\n",
"\n",
"> If there is some instruction that saves and restores two of these at a\n",
"> time (which LFPDX/STFPDX might I guess), then we can use that, otherwise\n",
- "> we'll have to do 64 saves/restores. \302\240Double load/stores will be faster\n",
+ "> we'll have to do 64 saves/restores. =A0Double load/stores will be faster\n",
"> I'm guessing though.\n",
"\n",
"I assume that's true.\n",
@@ -98,7 +101,8 @@
"\n",
"Kittyhawk version can be seen here:\n",
"\n",
- "http://git.kernel.org/?p=linux/kernel/git/ericvh/bluegene.git;a=commitdiff;h=94bffe786324b9bd07187b11afd836e3ec362d95\n",
+ "http://git.kernel.org/?p=3Dlinux/kernel/git/ericvh/bluegene.git;a=3Dcommitd=\n",
+ "iff;h=3D94bffe786324b9bd07187b11afd836e3ec362d95\n",
"\n",
">\n",
"> The most useful thing would be to see the instruction definition for\n",
@@ -108,36 +112,40 @@
"https://wiki.alcf.anl.gov/images/d/d9/PPC440_FP2_arch.pdf\n",
"\n",
">>\n",
- ">> >> =A0/*\n",
- ">> >> diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms=\n",
+ ">> >> =3DA0/*\n",
+ ">> >> diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platfo=\n",
+ "rms=3D\n",
">> /44x/\n",
">> > Kconfig\n",
">> >> index f485fc5f..24a515e 100644\n",
">> >> --- a/arch/powerpc/platforms/44x/Kconfig\n",
">> >> +++ b/arch/powerpc/platforms/44x/Kconfig\n",
">> >> \@\@ -169,6 +169,15 \@\@ config YOSEMITE\n",
- ">> >> =A0 =A0 =A0 help\n",
- ">> >> =A0 =A0 =A0 =A0 This option enables support for the AMCC PPC440EP evalua=\n",
+ ">> >> =3DA0 =3DA0 =3DA0 help\n",
+ ">> >> =3DA0 =3DA0 =3DA0 =3DA0 This option enables support for the AMCC PPC4=\n",
+ "40EP evalua=3D\n",
">> tion board.\n",
">> >>\n",
- ">> >> +config =A0 =A0 =A0 BGP\n",
+ ">> >> +config =3DA0 =3DA0 =3DA0 BGP\n",
">> >\n",
- ">> > Does this FPU feature have a specific name like double hammer? =A0I'd\n",
+ ">> > Does this FPU feature have a specific name like double hammer? =3DA0I'=\n",
+ "d\n",
">> > rather have the BGP defconfig depend on PPC_FPU_DOUBLE_HUMMER, or\n",
">> > something like that...\n",
">> >\n",
- ">> >> + =A0 =A0 bool \"Blue Gene/P\"\n",
- ">> >> + =A0 =A0 depends on 44x\n",
- ">> >> + =A0 =A0 default n\n",
- ">> >> + =A0 =A0 select PPC_FPU\n",
- ">> >> + =A0 =A0 select PPC_DOUBLE_FPU\n",
+ ">> >> + =3DA0 =3DA0 bool \"Blue Gene/P\"\n",
+ ">> >> + =3DA0 =3DA0 depends on 44x\n",
+ ">> >> + =3DA0 =3DA0 default n\n",
+ ">> >> + =3DA0 =3DA0 select PPC_FPU\n",
+ ">> >> + =3DA0 =3DA0 select PPC_DOUBLE_FPU\n",
">> >\n",
">> > ... in fact, it seem you are doing something like these here but you\n",
">> > don't use PPC_DOUBLE_FPU anywhere?\n",
">> >\n",
">>\n",
- ">> A fair point. \302\240I'm fine with calling it DOUBLE_HUMMER, but I wasn't sure if\n",
- ">> that was \"too internal\" of a name for the kernel. \302\240Let me know and\n",
+ ">> A fair point. =A0I'm fine with calling it DOUBLE_HUMMER, but I wasn't su=\n",
+ "re if\n",
+ ">> that was \"too internal\" of a name for the kernel. =A0Let me know and\n",
">> I'll fix it up.\n",
">\n",
"> What I'm mostly concerned about is disassociating it with a particular\n",
@@ -152,4 +160,4 @@
" -eric"
]
-85b285aec79bd63907af2d613930f5dc9dd6c47f3afc31366ad8a9be4f5b86a0
+49424cd24489bebc180df0f201d58d3a489f7f17205a3523444d441e83b39c49
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