From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pekka Enberg Subject: Re: [patch 1/2] kvm tools: Fix up PCI pin assignment to conform specification Date: Sat, 7 May 2011 18:05:31 +0300 Message-ID: References: <20110507145514.476517775@gmail.com> <20110507145636.099751964@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Cc: mingo@elte.hu, levinsasha928@gmail.com, asias.hejun@gmail.com, prasadjoshi124@gmail.com, kvm@vger.kernel.org To: Cyrill Gorcunov Return-path: Received: from mail-vx0-f174.google.com ([209.85.220.174]:57973 "EHLO mail-vx0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755463Ab1EGPFc (ORCPT ); Sat, 7 May 2011 11:05:32 -0400 Received: by vxi39 with SMTP id 39so4353862vxi.19 for ; Sat, 07 May 2011 08:05:31 -0700 (PDT) In-Reply-To: <20110507145636.099751964@gmail.com> Sender: kvm-owner@vger.kernel.org List-ID: On Sat, May 7, 2011 at 5:55 PM, Cyrill Gorcunov wrote: > Only 4 pins are allowed for every PCI compilant device. Mutlifunctional > devices can use up to all INTA#,B#,C#,D# pins, for our sindle function > devices pin INTA# is enough. > > Signed-off-by: Cyrill Gorcunov Could you point me to the relevant specification and section that I can use to double-check this patch (and include it in the changelog)?