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From: BrillyWu <brillywu@gmail.com>
To: avi@redhat.com, mtosatti@redhat.com, jan.kiszka@web.de,
	qemu-devel@nongnu.org, mst@redhat.com
Cc: karyjin@viatech.com.cn, kvm@vger.kernel.org,
	"BrillyWu@viatech.com.cn" <brillywu@viatech.com.cn>
Subject: [PATCH uq/master V2] kvm: Add CPUID support for VIA CPU
Date: Tue, 10 May 2011 16:02:38 +0800	[thread overview]
Message-ID: <BANLkTimzTSU7A-b9yc9H35b1szfL4z7H-A@mail.gmail.com> (raw)

From: BrillyWu <brillywu@viatech.com.cn>

When KVM is running on VIA CPU with host cpu's model, the
feautures of VIA CPU will be passed into kvm guest by calling
the CPUID instruction for Centaur.

Signed-off-by: BrillyWu<brillywu@viatech.com.cn>
Signed-off-by: KaryJin<karyjin@viatech.com.cn>
---
 target-i386/cpu.h   |    3 +++
 target-i386/cpuid.c |   46 +++++++++++++++++++++++++++++++++++++++++++++-
 target-i386/kvm.c   |   15 +++++++++++++++
 3 files changed, 63 insertions(+), 1 deletion(-)

--- a/target-i386/cpu.h	2011-05-09 09:55:48.624885001 +0800
+++ b/target-i386/cpu.h	2011-05-09 09:48:53.704885019 +0800
@@ -721,6 +721,9 @@ typedef struct CPUX86State {
     uint32_t cpuid_ext3_features;
     uint32_t cpuid_apic_id;
     int cpuid_vendor_override;
+    /* Store the results of Centaur's CPUID instructions */
+    uint32_t cpuid_xlevel2;
+    uint32_t cpuid_ext4_features;

     /* MTRRs */
     uint64_t mtrr_fixed[11];
--- a/target-i386/cpuid.c	2011-05-09 09:31:11.754884991 +0800
+++ b/target-i386/cpuid.c	2011-05-09 10:18:46.204885008 +0800
@@ -230,6 +230,9 @@ typedef struct x86_def_t {
     char model_id[48];
     int vendor_override;
     uint32_t flags;
+    /* Store the results of Centaur's CPUID instructions */
+    uint32_t ext4_features;
+    uint32_t xlevel2;
 } x86_def_t;

 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
@@ -522,6 +525,18 @@ static int cpu_x86_fill_host(x86_def_t *
     cpu_x86_fill_model_id(x86_cpu_def->model_id);
     x86_cpu_def->vendor_override = 0;

+    /* Call Centaur's CPUID instruction. */
+    if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
+    x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
+    x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
+        host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx);
+        if (eax >= 0xC0000001) {
+            /* Support VIA max extended level */
+            x86_cpu_def->xlevel2 = eax;
+            host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx);
+            x86_cpu_def->ext4_features = edx;
+        }
+    }

     /*
      * Every SVM feature requires emulation support in KVM - so we can't just
@@ -855,6 +870,8 @@ int cpu_x86_register (CPUX86State *env,
     env->cpuid_xlevel = def->xlevel;
     env->cpuid_kvm_features = def->kvm_features;
     env->cpuid_svm_features = def->svm_features;
+    env->cpuid_ext4_features = def->ext4_features;
+    env->cpuid_xlevel2 = def->xlevel2;
     if (!kvm_enabled()) {
         env->cpuid_features &= TCG_FEATURES;
         env->cpuid_ext_features &= TCG_EXT_FEATURES;
@@ -1034,7 +1051,12 @@ void cpu_x86_cpuid(CPUX86State *env, uin
                    uint32_t *ecx, uint32_t *edx)
 {
     /* test if maximum index reached */
-    if (index & 0x80000000) {
+    if ((index & 0xC000000f) == index) {
+        /* Handle the Centaur's CPUID instruction. */
+        if (index > env->cpuid_xlevel2) {
+            index = env->cpuid_xlevel2;
+        }
+    } else if (index & 0x80000000) {
         if (index > env->cpuid_xlevel)
             index = env->cpuid_level;
     } else {
@@ -1256,6 +1278,28 @@ void cpu_x86_cpuid(CPUX86State *env, uin
 		*edx = 0;
 	}
         break;
+    case 0xC0000000:
+        *eax = env->cpuid_xlevel2;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    case 0xC0000001:
+        /* Support for VIA CPU's CPUID instruction */
+        *eax = env->cpuid_version;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = env->cpuid_ext4_features;
+        break;
+    case 0xC0000002:
+    case 0xC0000003:
+    case 0xC0000004:
+        /* Reserved for the future, and now filled with zero */
+        *eax = 0;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
     default:
         /* reserved values: zero */
         *eax = 0;
--- a/target-i386/kvm.c	2011-05-09 09:31:04.284884996 +0800
+++ b/target-i386/kvm.c	2011-05-09 09:55:42.984885014 +0800
@@ -492,6 +492,21 @@ int kvm_arch_init_vcpu(CPUState *env)
         cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
     }

+    /* Call Centaur's CPUID instructions they are supported. */
+    if (env->cpuid_xlevel2 > 0) {
+        env->cpuid_ext4_features &=
+            kvm_arch_get_supported_cpuid(env, 0xC0000001, 0, R_EDX);
+        cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
+
+        for (i = 0xC0000000; i <= limit; i++) {
+            c = &cpuid_data.entries[cpuid_i++];
+
+            c->function = i;
+            c->flags = 0;
+            cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+        }
+    }
+
     cpuid_data.cpuid.nent = cpuid_i;

 #ifdef KVM_CAP_MCE

WARNING: multiple messages have this Message-ID (diff)
From: BrillyWu <brillywu@gmail.com>
To: avi@redhat.com, mtosatti@redhat.com, jan.kiszka@web.de,
	qemu-devel@nongnu.org, mst@redhat.com
Cc: karyjin@viatech.com.cn, kvm@vger.kernel.org,
	"BrillyWu@viatech.com.cn" <brillywu@viatech.com.cn>
Subject: [Qemu-devel] [PATCH uq/master V2] kvm: Add CPUID support for VIA CPU
Date: Tue, 10 May 2011 16:02:38 +0800	[thread overview]
Message-ID: <BANLkTimzTSU7A-b9yc9H35b1szfL4z7H-A@mail.gmail.com> (raw)

From: BrillyWu <brillywu@viatech.com.cn>

When KVM is running on VIA CPU with host cpu's model, the
feautures of VIA CPU will be passed into kvm guest by calling
the CPUID instruction for Centaur.

Signed-off-by: BrillyWu<brillywu@viatech.com.cn>
Signed-off-by: KaryJin<karyjin@viatech.com.cn>
---
 target-i386/cpu.h   |    3 +++
 target-i386/cpuid.c |   46 +++++++++++++++++++++++++++++++++++++++++++++-
 target-i386/kvm.c   |   15 +++++++++++++++
 3 files changed, 63 insertions(+), 1 deletion(-)

--- a/target-i386/cpu.h	2011-05-09 09:55:48.624885001 +0800
+++ b/target-i386/cpu.h	2011-05-09 09:48:53.704885019 +0800
@@ -721,6 +721,9 @@ typedef struct CPUX86State {
     uint32_t cpuid_ext3_features;
     uint32_t cpuid_apic_id;
     int cpuid_vendor_override;
+    /* Store the results of Centaur's CPUID instructions */
+    uint32_t cpuid_xlevel2;
+    uint32_t cpuid_ext4_features;

     /* MTRRs */
     uint64_t mtrr_fixed[11];
--- a/target-i386/cpuid.c	2011-05-09 09:31:11.754884991 +0800
+++ b/target-i386/cpuid.c	2011-05-09 10:18:46.204885008 +0800
@@ -230,6 +230,9 @@ typedef struct x86_def_t {
     char model_id[48];
     int vendor_override;
     uint32_t flags;
+    /* Store the results of Centaur's CPUID instructions */
+    uint32_t ext4_features;
+    uint32_t xlevel2;
 } x86_def_t;

 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
@@ -522,6 +525,18 @@ static int cpu_x86_fill_host(x86_def_t *
     cpu_x86_fill_model_id(x86_cpu_def->model_id);
     x86_cpu_def->vendor_override = 0;

+    /* Call Centaur's CPUID instruction. */
+    if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
+    x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
+    x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
+        host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx);
+        if (eax >= 0xC0000001) {
+            /* Support VIA max extended level */
+            x86_cpu_def->xlevel2 = eax;
+            host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx);
+            x86_cpu_def->ext4_features = edx;
+        }
+    }

     /*
      * Every SVM feature requires emulation support in KVM - so we can't just
@@ -855,6 +870,8 @@ int cpu_x86_register (CPUX86State *env,
     env->cpuid_xlevel = def->xlevel;
     env->cpuid_kvm_features = def->kvm_features;
     env->cpuid_svm_features = def->svm_features;
+    env->cpuid_ext4_features = def->ext4_features;
+    env->cpuid_xlevel2 = def->xlevel2;
     if (!kvm_enabled()) {
         env->cpuid_features &= TCG_FEATURES;
         env->cpuid_ext_features &= TCG_EXT_FEATURES;
@@ -1034,7 +1051,12 @@ void cpu_x86_cpuid(CPUX86State *env, uin
                    uint32_t *ecx, uint32_t *edx)
 {
     /* test if maximum index reached */
-    if (index & 0x80000000) {
+    if ((index & 0xC000000f) == index) {
+        /* Handle the Centaur's CPUID instruction. */
+        if (index > env->cpuid_xlevel2) {
+            index = env->cpuid_xlevel2;
+        }
+    } else if (index & 0x80000000) {
         if (index > env->cpuid_xlevel)
             index = env->cpuid_level;
     } else {
@@ -1256,6 +1278,28 @@ void cpu_x86_cpuid(CPUX86State *env, uin
 		*edx = 0;
 	}
         break;
+    case 0xC0000000:
+        *eax = env->cpuid_xlevel2;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    case 0xC0000001:
+        /* Support for VIA CPU's CPUID instruction */
+        *eax = env->cpuid_version;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = env->cpuid_ext4_features;
+        break;
+    case 0xC0000002:
+    case 0xC0000003:
+    case 0xC0000004:
+        /* Reserved for the future, and now filled with zero */
+        *eax = 0;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
     default:
         /* reserved values: zero */
         *eax = 0;
--- a/target-i386/kvm.c	2011-05-09 09:31:04.284884996 +0800
+++ b/target-i386/kvm.c	2011-05-09 09:55:42.984885014 +0800
@@ -492,6 +492,21 @@ int kvm_arch_init_vcpu(CPUState *env)
         cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
     }

+    /* Call Centaur's CPUID instructions they are supported. */
+    if (env->cpuid_xlevel2 > 0) {
+        env->cpuid_ext4_features &=
+            kvm_arch_get_supported_cpuid(env, 0xC0000001, 0, R_EDX);
+        cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
+
+        for (i = 0xC0000000; i <= limit; i++) {
+            c = &cpuid_data.entries[cpuid_i++];
+
+            c->function = i;
+            c->flags = 0;
+            cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+        }
+    }
+
     cpuid_data.cpuid.nent = cpuid_i;

 #ifdef KVM_CAP_MCE

             reply	other threads:[~2011-05-10  8:02 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-10  8:02 BrillyWu [this message]
2011-05-10  8:02 ` [Qemu-devel] [PATCH uq/master V2] kvm: Add CPUID support for VIA CPU BrillyWu
2011-05-11 11:50 ` Avi Kivity
2011-05-11 11:50   ` [Qemu-devel] " Avi Kivity
2011-05-28 10:28 ` Jan Kiszka
2011-05-28 10:28   ` [Qemu-devel] " Jan Kiszka
2011-05-28 16:20 ` Jan Kiszka
2011-05-28 16:20   ` [Qemu-devel] " Jan Kiszka
2011-05-30  4:02   ` BrillyWu
2011-05-30  4:02     ` [Qemu-devel] " BrillyWu
2011-05-30  7:40     ` BrillyWu
2011-05-30  7:40       ` [Qemu-devel] " BrillyWu
2011-05-30  7:47       ` Jan Kiszka
2011-05-30  7:47         ` [Qemu-devel] " Jan Kiszka
2011-05-30  8:59       ` BrillyWu
2011-05-30  8:59         ` [Qemu-devel] " BrillyWu
2011-05-30 10:45         ` Jan Kiszka
2011-05-30 10:45           ` [Qemu-devel] " Jan Kiszka
2011-05-31  1:25           ` BrillyWu
2011-05-31  1:25             ` [Qemu-devel] " BrillyWu
2011-05-31  6:11             ` Jan Kiszka
2011-05-31  6:11               ` [Qemu-devel] " Jan Kiszka
2011-05-31  7:39               ` BrillyWu
2011-05-31  7:39                 ` [Qemu-devel] " BrillyWu
2011-05-31  7:50                 ` Jan Kiszka
2011-05-31  7:50                   ` [Qemu-devel] " Jan Kiszka
2011-05-31  8:22                   ` BrillyWu
2011-05-31  8:22                     ` [Qemu-devel] " BrillyWu

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