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Mon, 9 Nov 2020 12:55:33 +0000 From: Damien Le Moal To: Mark Brown CC: Palmer Dabbelt , "linux-riscv@lists.infradead.org" , Rob Herring , Frank Rowand , "devicetree@vger.kernel.org" , Serge Semin , "linux-spi@vger.kernel.org" , Stephen Boyd , "linux-clk@vger.kernel.org" , Linus Walleij , "linux-gpio@vger.kernel.org" , Philipp Zabel , Sean Anderson Subject: Re: [PATCH 00/32] RISC-V Kendryte K210 support improvments Thread-Topic: [PATCH 00/32] RISC-V Kendryte K210 support improvments Thread-Index: AQHWtN4FNXR+gWbiK06uOGycOksW5g== Date: Mon, 9 Nov 2020 12:55:33 +0000 Message-ID: References: <20201107081420.60325-1-damien.lemoal@wdc.com> <20201109125111.GA6380@sirena.org.uk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=wdc.com; x-originating-ip: [2400:2411:43c0:6000:89bb:1cde:d92a:2dcb] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: bf23a7ac-bc53-4c03-5558-08d884aebecc x-ms-traffictypediagnostic: MN2PR04MB6927: x-microsoft-antispam-prvs: wdcipoutbound: EOP-TRUE x-ms-oob-tlc-oobclassifiers: OLM:7219; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BL0PR04MB6514.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: bf23a7ac-bc53-4c03-5558-08d884aebecc X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Nov 2020 12:55:33.2237 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 4qTdFo5OVqbOfDH1rZSZ26Uky1kG66dufmfB3zew68SJQGbSyKkwnqEaVX55WNipXxjzL3lPoIeDkt9Ud8Pv5w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB6927 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 2020/11/09 21:51, Mark Brown wrote:=0A= > On Sat, Nov 07, 2020 at 05:13:48PM +0900, Damien Le Moal wrote:=0A= > =0A= >> The first patch of this series is a fix of the device tree parsing code.= =0A= >> Without this fix, a warning is generated when parsing Designware gpio=0A= >> controller nodes.=0A= > =0A= >> The following 6 patches are fixes and improvements to the Designware SPI= =0A= >> driver to enable support for the MMC-spi slot found on all K210 boards.= =0A= > =0A= >> Pathes 8 to 13 are various fixes for riscv arch code and riscv=0A= >> dependent devices. Of not here is patch 11 which fix system call=0A= >> execution in the no MMU case, and patch 13 which simplifies DTB builtin= =0A= >> handling.=0A= > =0A= >> The following patches 14 to 25 implement and document idevice tree=0A= >> mapping of several drivers for the K210 SoC: clock driver, reset=0A= >> controller and pin function management (pinctrl).=0A= > =0A= >> Patches 26 to 31 update the existing K210 device tree and device new=0A= >> device tree files for several K210 based boards: the MAIX Bit,=0A= >> MAIXSUINO, MAIX Dock and MAIX Go boards from SiPeed and the KD233=0A= >> development board from Kendryte.=0A= > =0A= > Please don't mix unrelated changes into a single series like this -=0A= > patch serieses this big are generally something to be avoided at the=0A= > best of times since they're a bit overwhelming in people's inboxes and=0A= > when unrelated changes are put in a single series it makes dependencies= =0A= > between patches unclear which can hold things up. It is better to send= =0A= > the changes for each subsystem separately, it makes life easier all=0A= > round.=0A= =0A= I wondered about it and in retrospect, it was a bad idea indeed to send=0A= everything to everyone. My apologies about that.=0A= I need to send a V2 but this time I will split it up by subsystem. Some pat= ches=0A= are related however (e.g. DT changes and documentation), so I will keep the= se=0A= together.=0A= =0A= Thanks !=0A= =0A= -- =0A= Damien Le Moal=0A= Western Digital Research=0A= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98C74C2D0A3 for ; Mon, 9 Nov 2020 12:55:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D17820789 for ; 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Mon, 9 Nov 2020 12:55:33 +0000 From: Damien Le Moal To: Mark Brown Subject: Re: [PATCH 00/32] RISC-V Kendryte K210 support improvments Thread-Topic: [PATCH 00/32] RISC-V Kendryte K210 support improvments Thread-Index: AQHWtN4FNXR+gWbiK06uOGycOksW5g== Date: Mon, 9 Nov 2020 12:55:33 +0000 Message-ID: References: <20201107081420.60325-1-damien.lemoal@wdc.com> <20201109125111.GA6380@sirena.org.uk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=wdc.com; x-originating-ip: [2400:2411:43c0:6000:89bb:1cde:d92a:2dcb] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: bf23a7ac-bc53-4c03-5558-08d884aebecc x-ms-traffictypediagnostic: MN2PR04MB6927: x-microsoft-antispam-prvs: wdcipoutbound: EOP-TRUE x-ms-oob-tlc-oobclassifiers: OLM:7219; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 2020/11/09 21:51, Mark Brown wrote: > On Sat, Nov 07, 2020 at 05:13:48PM +0900, Damien Le Moal wrote: > >> The first patch of this series is a fix of the device tree parsing code. >> Without this fix, a warning is generated when parsing Designware gpio >> controller nodes. > >> The following 6 patches are fixes and improvements to the Designware SPI >> driver to enable support for the MMC-spi slot found on all K210 boards. > >> Pathes 8 to 13 are various fixes for riscv arch code and riscv >> dependent devices. Of not here is patch 11 which fix system call >> execution in the no MMU case, and patch 13 which simplifies DTB builtin >> handling. > >> The following patches 14 to 25 implement and document idevice tree >> mapping of several drivers for the K210 SoC: clock driver, reset >> controller and pin function management (pinctrl). > >> Patches 26 to 31 update the existing K210 device tree and device new >> device tree files for several K210 based boards: the MAIX Bit, >> MAIXSUINO, MAIX Dock and MAIX Go boards from SiPeed and the KD233 >> development board from Kendryte. > > Please don't mix unrelated changes into a single series like this - > patch serieses this big are generally something to be avoided at the > best of times since they're a bit overwhelming in people's inboxes and > when unrelated changes are put in a single series it makes dependencies > between patches unclear which can hold things up. It is better to send > the changes for each subsystem separately, it makes life easier all > round. I wondered about it and in retrospect, it was a bad idea indeed to send everything to everyone. My apologies about that. I need to send a V2 but this time I will split it up by subsystem. Some patches are related however (e.g. DT changes and documentation), so I will keep these together. Thanks ! -- Damien Le Moal Western Digital Research _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv