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Sat, 6 Feb 2021 00:52:12 +0000 From: Damien Le Moal To: Sean Anderson , "robh@kernel.org" CC: "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "linux-riscv@lists.infradead.org" , Atish Patra , "devicetree@vger.kernel.org" , Anup Patel Subject: Re: [PATCH v14 07/16] dt-bindings: fix sifive gpio properties Thread-Topic: [PATCH v14 07/16] dt-bindings: fix sifive gpio properties Thread-Index: AQHW+U9T59FA/s8Z20mcfAvTuPFEfg== Date: Sat, 6 Feb 2021 00:52:12 +0000 Message-ID: References: <20210202103623.200809-1-damien.lemoal@wdc.com> <20210202103623.200809-8-damien.lemoal@wdc.com> <89cccbae5add85c7bd811f3819ea3db7061e928d.camel@wdc.com> <6351faa35c175d38e033ce433780c03c141c0ddf.camel@wdc.com> <1726dceb-868e-68a1-38df-2f80ee233ed1@gmail.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=none action=none header.from=wdc.com; x-originating-ip: [2400:2411:43c0:6000:50f7:ee01:712b:bf92] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 5cd97d2a-ab96-4233-753d-08d8ca397088 x-ms-traffictypediagnostic: MN2PR04MB6846: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: wdcipoutbound: EOP-TRUE x-ms-oob-tlc-oobclassifiers: OLM:9508; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BL0PR04MB6514.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5cd97d2a-ab96-4233-753d-08d8ca397088 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Feb 2021 00:52:12.2086 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: KXW9sLa/LBQNQdc2yFBFd1sODvb92JrAkhm0rLDcq8VXMUGVOR+qbqBHWNX+a/56aKEz3Pepy2eirbhaeS8PKw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB6846 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 2021/02/06 9:31, Sean Anderson wrote:=0A= > On 2/5/21 6:32 PM, Damien Le Moal wrote:=0A= >> On Fri, 2021-02-05 at 17:55 -0500, Sean Anderson wrote:=0A= >>> On 2/5/21 5:53 PM, Damien Le Moal wrote:=0A= >>>> On Fri, 2021-02-05 at 14:02 -0600, Rob Herring wrote:=0A= >>>>> On Wed, Feb 3, 2021 at 6:47 PM Damien Le Moal = wrote:=0A= >>>>>>=0A= >>>>>> On Wed, 2021-02-03 at 14:41 -0600, Rob Herring wrote:=0A= >>>>>>> On Wed, Feb 3, 2021 at 6:52 AM Damien Le Moal wrote:=0A= >>>>>>>>=0A= >>>>>>>> On Tue, 2021-02-02 at 13:02 -0600, Rob Herring wrote:=0A= >>>>>>>>> On Tue, Feb 2, 2021 at 4:36 AM Damien Le Moal wrote:=0A= >>>>>>>>>>=0A= >>>>>>>>>> The sifive gpio IP block supports up to 32 GPIOs. Reflect that i= n the=0A= >>>>>>>>>> interrupts property description and maxItems. Also add the stand= ard=0A= >>>>>>>>>> ngpios property to describe the number of GPIOs available on the= =0A= >>>>>>>>>> implementation.=0A= >>>>>>>>>>=0A= >>>>>>>>>> Also add the "canaan,k210-gpiohs" compatible string to indicate = the use=0A= >>>>>>>>>> of this gpio controller in the Canaan Kendryte K210 SoC. If this= =0A= >>>>>>>>>> compatible string is used, do not define the clocks property as= =0A= >>>>>>>>>> required as the K210 SoC does not have a software controllable c= lock=0A= >>>>>>>>>> for the Sifive gpio IP block.=0A= >>>>>>>>>>=0A= >>>>>>>>>> Cc: Paul Walmsley =0A= >>>>>>>>>> Cc: Rob Herring =0A= >>>>>>>>>> Cc: devicetree@vger.kernel.org=0A= >>>>>>>>>> Signed-off-by: Damien Le Moal =0A= >>>>>>>>>> ---=0A= >>>>>>>>>> .../devicetree/bindings/gpio/sifive,gpio.yaml | 21 ++++++++++= ++++++---=0A= >>>>>>>>>> 1 file changed, 18 insertions(+), 3 deletions(-)=0A= >>>>>>>>>>=0A= >>>>>>>>>> diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.= yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml=0A= >>>>>>>>>> index ab22056f8b44..2cef18ca737c 100644=0A= >>>>>>>>>> --- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml=0A= >>>>>>>>>> +++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml=0A= >>>>>>>>>> @@ -16,6 +16,7 @@ properties:=0A= >>>>>>>>>> - enum:=0A= >>>>>>>>>> - sifive,fu540-c000-gpio=0A= >>>>>>>>>> - sifive,fu740-c000-gpio=0A= >>>>>>>>>> + - canaan,k210-gpiohs=0A= >>>>>>>>>> - const: sifive,gpio0=0A= >>>>>>>>>>=0A= >>>>>>>>>> reg:=0A= >>>>>>>>>> @@ -23,9 +24,9 @@ properties:=0A= >>>>>>>>>>=0A= >>>>>>>>>> interrupts:=0A= >>>>>>>>>> description:=0A= >>>>>>>>>> - interrupt mapping one per GPIO. Maximum 16 GPIOs.=0A= >>>>>>>>>> + interrupt mapping one per GPIO. Maximum 32 GPIOs.=0A= >>>>>>>>>> minItems: 1=0A= >>>>>>>>>> - maxItems: 16=0A= >>>>>>>>>> + maxItems: 32=0A= >>>>>>>>>>=0A= >>>>>>>>>> interrupt-controller: true=0A= >>>>>>>>>>=0A= >>>>>>>>>> @@ -38,6 +39,10 @@ properties:=0A= >>>>>>>>>> "#gpio-cells":=0A= >>>>>>>>>> const: 2=0A= >>>>>>>>>>=0A= >>>>>>>>>> + ngpios:=0A= >>>>>>>>>> + minimum: 1=0A= >>>>>>>>>> + maximum: 32=0A= >>>>>>>>>=0A= >>>>>>>>> What's the default as obviously drivers already assume something.= =0A= >>>>>>>>>=0A= >>>>>>>>> Does a driver actually need to know this? For example, does the= =0A= >>>>>>>>> register stride change or something?=0A= >>>>>>>>>=0A= >>>>>>>>> Please don't add it if the only purpose is error check your DT (I= OW,=0A= >>>>>>>>> if it just checks the max cell value in gpios phandles).=0A= >>>>>>>>=0A= >>>>>>>> If I remove that, make dtbs_check complains. Looking at othe gpio = controller=0A= >>>>>>>> bindings, they all have it. So isn't it better to be consistent, a= nd avoid make=0A= >>>>>>>> dtbs_check errors ?=0A= >>>>>>>=0A= >>>>>>> That would mean you are already using 'ngpios' and it is undocument= ed=0A= >>>>>>> (for this binding). If already in use and possibly having users the= n=0A= >>>>>>> that changes things, but that's not what the commit msg says.=0A= >>>>>>>=0A= >>>>>>> Not *all* gpio controllers have ngpios. It's a good number, but=0A= >>>>>>> probably more than need it though. If we wanted it everywhere, ther= e=0A= >>>>>>> would be a schema enforcing that.=0A= >>>>>>=0A= >>>>>> If I remove the minimum and maximum lines, I get this error:=0A= >>>>>=0A= >>>>> I never said remove minimum/maximum. The suggestion is either add=0A= >>>>> 'default: 16' or remove 'ngpios' entirely.=0A= >>>>>=0A= >>>>>> ./Documentation/devicetree/bindings/gpio/sifive,gpio.yaml:42:10: [er= ror] empty=0A= >>>>>> value in block mapping (empty-values)=0A= >>>>>> CHKDT Documentation/devicetree/bindings/processed-schema-examp= les.json=0A= >>>>>> /home/damien/Projects/RISCV/linux/Documentation/devicetree/bindings/= gpio/sifive=0A= >>>>>> ,gpio.yaml: properties:ngpios: None is not of type 'object', 'boolea= n'=0A= >>>>>> SCHEMA Documentation/devicetree/bindings/processed-schema-examp= les.json=0A= >>>>>> /home/damien/Projects/RISCV/linux/Documentation/devicetree/bindings/= gpio/sifive=0A= >>>>>> ,gpio.yaml: ignoring, error in schema: properties: ngpios=0A= >>>>>> warning: no schema found in file:=0A= >>>>>> ./Documentation/devicetree/bindings/gpio/sifive,gpio.yaml=0A= >>>>>=0A= >>>>> ngpios: true=0A= >>>>>=0A= >>>>> or=0A= >>>>>=0A= >>>>> ngpios: {}=0A= >>>>>=0A= >>>>> Are the minimum valid values for a key. (Though not what should be do= ne here.)=0A= >>>>>=0A= >>>>>>=0A= >>>>>> If I remove the ngpios property entirely, then I get a hit on the de= vice tree:=0A= >>>>>>=0A= >>>>>> CHECK arch/riscv/boot/dts/canaan/sipeed_maix_bit.dt.yaml=0A= >>>>>> /linux/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dt.yaml:=0A= >>>>>> gpio-controller@38001000: 'ngpios' does not match any of the regexes= : 'pinctrl-=0A= >>>>>> [0-9]+'=0A= >>>>>> From schema:=0A= >>>>>> /home/damien/Projects/RISCV/linux/Documentation/devicetree/bindings/= gpio/sifive=0A= >>>>>> ,gpio.yaml=0A= >>>>>=0A= >>>>> That's not upstream, right? Then fix it.=0A= >>>>>=0A= >>>>>> Now, If I change the property definition to this:=0A= >>>>>>=0A= >>>>>> diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml= =0A= >>>>>> b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml=0A= >>>>>> index 2cef18ca737c..5c7865180383 100644=0A= >>>>>> --- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml=0A= >>>>>> +++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml=0A= >>>>>> @@ -40,8 +40,11 @@ properties:=0A= >>>>>> const: 2=0A= >>>>>>=0A= >>>>>> ngpios:=0A= >>>>>> - minimum: 1=0A= >>>>>> - maximum: 32=0A= >>>>>> + $ref: /schemas/types.yaml#/definitions/uint32=0A= >>>>>> + description:=0A= >>>>>> + The number of GPIO pins implemented by the controller.=0A= >>>>>> + It is 16 for the SiFive SoCs and 32 for the Canaan K210 SoC.= =0A= >>>>>> +=0A= >>>>>>=0A= >>>>>> gpio-controller: true=0A= >>>>>>=0A= >>>>>> Then all is OK.=0A= >>>>>>=0A= >>>>>> Which option should I go for here ? If we want to avoid a dtbs_check= error, as=0A= >>>>>> far as I can see, we can:=0A= >>>>>> 1) Remove the ngpios property and remove its use from the DTS, which= is not=0A= >>>>>> nice in my opinion=0A= >>>>>=0A= >>>>> Again, it depends if there are users depending on it. A user being a= =0A= >>>>> GPIO driver somewhere, not a DTS file. The GPIO driver in the kernel= =0A= >>>>> doesn't need it. So u-boot? BSD?=0A= >>>>=0A= >>>> The Linux driver uses the number of interrupts for the number of gpios= but=0A= >>>> upstream U-Boot uses the ngpios property. So I will change this to use= =0A= >>>> "default: 16" as you suggested.=0A= >>>=0A= >>> There is no reasonable default for this hardware. I would much rather= =0A= >>> you keep the schema as-is, or at least go with the second option.=0A= >>=0A= >> Since the SiFive official doc seems to say "16" as the number of gpio fo= r this=0A= >> controller, we could assume that to be the default. No ? But I agree tha= t=0A= >> clearly, the implementation can be hacked to have any number of GPIOs...= =0A= > =0A= > Keep in mind that those docs are for SiFive's particular instantiation=0A= > of that IP, not for the IP in general. Although some parameters (e.g.=0A= > dsWidth) have defaults, width does not.=0A= =0A= OK. Then I think the simplest is to keep the minimum/maximum. Many binding = docs=0A= use that anyway.=0A= =0A= Rob, any objections ?=0A= =0A= =0A= > =0A= > --Sean=0A= > =0A= >>=0A= >>=0A= >>>=0A= >>> --Sean=0A= >>>=0A= >>>>=0A= >>>> Thanks !=0A= >>>>=0A= >>>>>=0A= >>>>>> 2) Use the modification proposed above=0A= >>>>=0A= >>>=0A= >>=0A= > =0A= > =0A= =0A= =0A= -- =0A= Damien Le Moal=0A= Western Digital Research=0A= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0829C433DB for ; Sat, 6 Feb 2021 00:52:38 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DD06F65015 for ; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 2021/02/06 9:31, Sean Anderson wrote: > On 2/5/21 6:32 PM, Damien Le Moal wrote: >> On Fri, 2021-02-05 at 17:55 -0500, Sean Anderson wrote: >>> On 2/5/21 5:53 PM, Damien Le Moal wrote: >>>> On Fri, 2021-02-05 at 14:02 -0600, Rob Herring wrote: >>>>> On Wed, Feb 3, 2021 at 6:47 PM Damien Le Moal wrote: >>>>>> >>>>>> On Wed, 2021-02-03 at 14:41 -0600, Rob Herring wrote: >>>>>>> On Wed, Feb 3, 2021 at 6:52 AM Damien Le Moal wrote: >>>>>>>> >>>>>>>> On Tue, 2021-02-02 at 13:02 -0600, Rob Herring wrote: >>>>>>>>> On Tue, Feb 2, 2021 at 4:36 AM Damien Le Moal wrote: >>>>>>>>>> >>>>>>>>>> The sifive gpio IP block supports up to 32 GPIOs. Reflect that in the >>>>>>>>>> interrupts property description and maxItems. Also add the standard >>>>>>>>>> ngpios property to describe the number of GPIOs available on the >>>>>>>>>> implementation. >>>>>>>>>> >>>>>>>>>> Also add the "canaan,k210-gpiohs" compatible string to indicate the use >>>>>>>>>> of this gpio controller in the Canaan Kendryte K210 SoC. If this >>>>>>>>>> compatible string is used, do not define the clocks property as >>>>>>>>>> required as the K210 SoC does not have a software controllable clock >>>>>>>>>> for the Sifive gpio IP block. >>>>>>>>>> >>>>>>>>>> Cc: Paul Walmsley >>>>>>>>>> Cc: Rob Herring >>>>>>>>>> Cc: devicetree@vger.kernel.org >>>>>>>>>> Signed-off-by: Damien Le Moal >>>>>>>>>> --- >>>>>>>>>> .../devicetree/bindings/gpio/sifive,gpio.yaml | 21 ++++++++++++++++--- >>>>>>>>>> 1 file changed, 18 insertions(+), 3 deletions(-) >>>>>>>>>> >>>>>>>>>> diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>>>>>>> index ab22056f8b44..2cef18ca737c 100644 >>>>>>>>>> --- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>>>>>>> +++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>>>>>>> @@ -16,6 +16,7 @@ properties: >>>>>>>>>> - enum: >>>>>>>>>> - sifive,fu540-c000-gpio >>>>>>>>>> - sifive,fu740-c000-gpio >>>>>>>>>> + - canaan,k210-gpiohs >>>>>>>>>> - const: sifive,gpio0 >>>>>>>>>> >>>>>>>>>> reg: >>>>>>>>>> @@ -23,9 +24,9 @@ properties: >>>>>>>>>> >>>>>>>>>> interrupts: >>>>>>>>>> description: >>>>>>>>>> - interrupt mapping one per GPIO. Maximum 16 GPIOs. >>>>>>>>>> + interrupt mapping one per GPIO. Maximum 32 GPIOs. >>>>>>>>>> minItems: 1 >>>>>>>>>> - maxItems: 16 >>>>>>>>>> + maxItems: 32 >>>>>>>>>> >>>>>>>>>> interrupt-controller: true >>>>>>>>>> >>>>>>>>>> @@ -38,6 +39,10 @@ properties: >>>>>>>>>> "#gpio-cells": >>>>>>>>>> const: 2 >>>>>>>>>> >>>>>>>>>> + ngpios: >>>>>>>>>> + minimum: 1 >>>>>>>>>> + maximum: 32 >>>>>>>>> >>>>>>>>> What's the default as obviously drivers already assume something. >>>>>>>>> >>>>>>>>> Does a driver actually need to know this? For example, does the >>>>>>>>> register stride change or something? >>>>>>>>> >>>>>>>>> Please don't add it if the only purpose is error check your DT (IOW, >>>>>>>>> if it just checks the max cell value in gpios phandles). >>>>>>>> >>>>>>>> If I remove that, make dtbs_check complains. Looking at othe gpio controller >>>>>>>> bindings, they all have it. So isn't it better to be consistent, and avoid make >>>>>>>> dtbs_check errors ? >>>>>>> >>>>>>> That would mean you are already using 'ngpios' and it is undocumented >>>>>>> (for this binding). If already in use and possibly having users then >>>>>>> that changes things, but that's not what the commit msg says. >>>>>>> >>>>>>> Not *all* gpio controllers have ngpios. It's a good number, but >>>>>>> probably more than need it though. If we wanted it everywhere, there >>>>>>> would be a schema enforcing that. >>>>>> >>>>>> If I remove the minimum and maximum lines, I get this error: >>>>> >>>>> I never said remove minimum/maximum. The suggestion is either add >>>>> 'default: 16' or remove 'ngpios' entirely. >>>>> >>>>>> ./Documentation/devicetree/bindings/gpio/sifive,gpio.yaml:42:10: [error] empty >>>>>> value in block mapping (empty-values) >>>>>> CHKDT Documentation/devicetree/bindings/processed-schema-examples.json >>>>>> /home/damien/Projects/RISCV/linux/Documentation/devicetree/bindings/gpio/sifive >>>>>> ,gpio.yaml: properties:ngpios: None is not of type 'object', 'boolean' >>>>>> SCHEMA Documentation/devicetree/bindings/processed-schema-examples.json >>>>>> /home/damien/Projects/RISCV/linux/Documentation/devicetree/bindings/gpio/sifive >>>>>> ,gpio.yaml: ignoring, error in schema: properties: ngpios >>>>>> warning: no schema found in file: >>>>>> ./Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>> >>>>> ngpios: true >>>>> >>>>> or >>>>> >>>>> ngpios: {} >>>>> >>>>> Are the minimum valid values for a key. (Though not what should be done here.) >>>>> >>>>>> >>>>>> If I remove the ngpios property entirely, then I get a hit on the device tree: >>>>>> >>>>>> CHECK arch/riscv/boot/dts/canaan/sipeed_maix_bit.dt.yaml >>>>>> /linux/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dt.yaml: >>>>>> gpio-controller@38001000: 'ngpios' does not match any of the regexes: 'pinctrl- >>>>>> [0-9]+' >>>>>> From schema: >>>>>> /home/damien/Projects/RISCV/linux/Documentation/devicetree/bindings/gpio/sifive >>>>>> ,gpio.yaml >>>>> >>>>> That's not upstream, right? Then fix it. >>>>> >>>>>> Now, If I change the property definition to this: >>>>>> >>>>>> diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>>> b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>>> index 2cef18ca737c..5c7865180383 100644 >>>>>> --- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>>> +++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml >>>>>> @@ -40,8 +40,11 @@ properties: >>>>>> const: 2 >>>>>> >>>>>> ngpios: >>>>>> - minimum: 1 >>>>>> - maximum: 32 >>>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>>> + description: >>>>>> + The number of GPIO pins implemented by the controller. >>>>>> + It is 16 for the SiFive SoCs and 32 for the Canaan K210 SoC. >>>>>> + >>>>>> >>>>>> gpio-controller: true >>>>>> >>>>>> Then all is OK. >>>>>> >>>>>> Which option should I go for here ? If we want to avoid a dtbs_check error, as >>>>>> far as I can see, we can: >>>>>> 1) Remove the ngpios property and remove its use from the DTS, which is not >>>>>> nice in my opinion >>>>> >>>>> Again, it depends if there are users depending on it. A user being a >>>>> GPIO driver somewhere, not a DTS file. The GPIO driver in the kernel >>>>> doesn't need it. So u-boot? BSD? >>>> >>>> The Linux driver uses the number of interrupts for the number of gpios but >>>> upstream U-Boot uses the ngpios property. So I will change this to use >>>> "default: 16" as you suggested. >>> >>> There is no reasonable default for this hardware. I would much rather >>> you keep the schema as-is, or at least go with the second option. >> >> Since the SiFive official doc seems to say "16" as the number of gpio for this >> controller, we could assume that to be the default. No ? But I agree that >> clearly, the implementation can be hacked to have any number of GPIOs... > > Keep in mind that those docs are for SiFive's particular instantiation > of that IP, not for the IP in general. Although some parameters (e.g. > dsWidth) have defaults, width does not. OK. Then I think the simplest is to keep the minimum/maximum. Many binding docs use that anyway. Rob, any objections ? > > --Sean > >> >> >>> >>> --Sean >>> >>>> >>>> Thanks ! >>>> >>>>> >>>>>> 2) Use the modification proposed above >>>> >>> >> > > -- Damien Le Moal Western Digital Research _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv