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charset="us-ascii" Content-Transfer-Encoding: quoted-printable [AMD Official Use Only] Acked-by: Alex Deucher ________________________________ From: Chen, Guchun Sent: Tuesday, February 22, 2022 10:07 AM To: amd-gfx@lists.freedesktop.org ; Deucher,= Alexander ; Zhang, Hawking ; Koenig, Christian ; Pan, Xinhui Cc: Chen, Guchun Subject: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs Due to faulty VBIOS out there, harvest bit setting is not consistently correct especially for display IP. So far, it's hard to work out a solution on all the legacy Navi1x ASICs in a short time, so to avoid regression, limit harvest bit read on several ASICs. Will revisit later once VBIOS has corrected it in long term. Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on legacy GPU= s") Signed-off-by: Guchun Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/dr= m/amd/amdgpu/amdgpu_discovery.c index 11255290f117..2e0ff1ace6fc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_devi= ce *adev) * so read harvest bit per IP data structure to set * harvest configuration. */ - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) - amdgpu_discovery_read_harvest_bit_per_ip(adev, - &vcn_harvest_count)= ; - else + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) { + if ((adev->pdev->device =3D=3D 0x731E && + (adev->pdev->revision =3D=3D 0xC6 || + adev->pdev->revision =3D=3D 0xC7)) || + (adev->pdev->device =3D=3D 0x7340 && + adev->pdev->revision =3D=3D 0xC9) || + (adev->pdev->device =3D=3D 0x7360 && + adev->pdev->revision =3D=3D 0xC7)) + amdgpu_discovery_read_harvest_bit_per_ip(adev, + &vcn_harvest_count); + } else { amdgpu_disocvery_read_from_harvest_table(adev, - &vcn_harvest_count)= ; + &vcn_harvest_count); + } amdgpu_discovery_harvest_config_quirk(adev); -- 2.17.1 --_000_BL1PR12MB5144943B84097486016D420AF73B9BL1PR12MB5144namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

[AMD Official Use Only]


Acked-by: Alex Deucher <alexander.deucher@amd.com>
From: Chen, Guchun <Guch= un.Chen@amd.com>
Sent: Tuesday, February 22, 2022 10:07 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org&= gt;; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking &= lt;Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.co= m>; Pan, Xinhui <Xinhui.Pan@amd.com>
Cc: Chen, Guchun <Guchun.Chen@amd.com>
Subject: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs=
 
Due to faulty VBIOS out there, harvest bit setting= is not
consistently correct especially for display IP. So far,
it's hard to work out a solution on all the legacy Navi1x
ASICs in a short time, so to avoid regression, limit harvest
bit read on several ASICs. Will revisit later once VBIOS has
corrected it in long term.

Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on legac= y GPUs")
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++-----=
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/dr= m/amd/amdgpu/amdgpu_discovery.c
index 11255290f117..2e0ff1ace6fc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_devi= ce *adev)
          * so read harvest bi= t per IP data structure to set
          * harvest configurat= ion.
          */
-       if (adev->ip_versions[GC_HWIP][0] = < IP_VERSION(10, 2, 0))
-            &n= bsp;  amdgpu_discovery_read_harvest_bit_per_ip(adev,
-            &n= bsp;            = ;            &n= bsp;            = ;     &vcn_harvest_count);
-       else
+       if (adev->ip_versions[GC_HWIP][0] = < IP_VERSION(10, 2, 0)) {
+            &n= bsp;  if ((adev->pdev->device =3D=3D 0x731E &&
+            &n= bsp;          (adev->pdev-&= gt;revision =3D=3D 0xC6 ||
+            &n= bsp;           adev->p= dev->revision =3D=3D 0xC7)) ||
+            &n= bsp;          (adev->pdev-&= gt;device =3D=3D 0x7340 &&
+            &n= bsp;           adev->p= dev->revision =3D=3D 0xC9) ||
+            &n= bsp;          (adev->pdev-&= gt;device =3D=3D 0x7360 &&
+            &n= bsp;           adev->p= dev->revision =3D=3D 0xC7))
+            &n= bsp;          amdgpu_discovery= _read_harvest_bit_per_ip(adev,
+            &n= bsp;            = ;      &vcn_harvest_count);
+       } else {
            &nb= sp;    amdgpu_disocvery_read_from_harvest_table(adev,
-            &n= bsp;            = ;            &n= bsp;            = ;     &vcn_harvest_count);
+            &n= bsp;          &vcn_harvest= _count);
+       }
 
         amdgpu_discovery_harvest_c= onfig_quirk(adev);
 
--
2.17.1

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