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charset="us-ascii" Content-Transfer-Encoding: quoted-printable [Public] Acked-by: Alex Deucher ________________________________ From: amd-gfx on behalf of Prike Li= ang Sent: Monday, April 25, 2022 2:52 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Lazar, Lijo ; Liang, Prike ; Huang, Ray Subject: [PATCH] drm/amdgpu: keep mmhub clock gating being enabled during s= 2idle suspend Without MMHUB clock gating being enabled then MMHUB will not disconnect from DF and will result in DF C-state entry can't be accessed during S2idle suspend, and eventually s0ix entry will be blocked. Signed-off-by: Prike Liang --- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/a= mdgpu/gmc_v10_0.c index a455e59f41f4..20946bc7fc93 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c @@ -1151,6 +1151,16 @@ static int gmc_v10_0_set_clockgating_state(void *han= dle, int r; struct amdgpu_device *adev =3D (struct amdgpu_device *)handle; + /* + * The issue mmhub can't disconnect from DF with MMHUB clock gating= being disabled + * is a new problem observed at DF 3.0.3, however with the same sus= pend sequence not + * seen any issue on the DF 3.0.2 series platform. + */ + if (adev->in_s0ix && adev->ip_versions[DF_HWIP][0] > IP_VERSION(3, = 0, 2)) { + dev_dbg(adev->dev, "keep mmhub clock gating being enabled f= or s0ix\n"); + return 0; + } + r =3D adev->mmhub.funcs->set_clockgating(adev, state); if (r) return r; -- 2.25.1 --_000_BL1PR12MB5144E85AAA1350161E0018FBF7F89BL1PR12MB5144namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

[Public]


Acked-by: Alex Deucher <alexander.deucher@amd.com>
From: amd-gfx <amd-gfx-b= ounces@lists.freedesktop.org> on behalf of Prike Liang <Prike.Liang@a= md.com>
Sent: Monday, April 25, 2022 2:52 AM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org&= gt;
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lij= o <Lijo.Lazar@amd.com>; Liang, Prike <Prike.Liang@amd.com>; Hua= ng, Ray <Ray.Huang@amd.com>
Subject: [PATCH] drm/amdgpu: keep mmhub clock gating being enabled d= uring s2idle suspend
 
Without MMHUB clock gating being enabled then MMHU= B will not disconnect
from DF and will result in DF C-state entry can't be accessed during S2idle=
suspend, and eventually s0ix entry will be blocked.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/a= mdgpu/gmc_v10_0.c
index a455e59f41f4..20946bc7fc93 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -1151,6 +1151,16 @@ static int gmc_v10_0_set_clockgating_state(void *han= dle,
         int r;
         struct amdgpu_device *adev= =3D (struct amdgpu_device *)handle;
 
+       /*
+        * The issue mmhub can't disconn= ect from DF with MMHUB clock gating being disabled
+        * is a new problem observed at = DF 3.0.3, however with the same suspend sequence not
+        * seen any issue on the DF 3.0.= 2 series platform.
+        */
+       if (adev->in_s0ix && adev-= >ip_versions[DF_HWIP][0] > IP_VERSION(3, 0, 2)) {
+            &n= bsp;  dev_dbg(adev->dev, "keep mmhub clock gating being enable= d for s0ix\n");
+            &n= bsp;  return 0;
+       }
+
         r =3D adev->mmhub.funcs= ->set_clockgating(adev, state);
         if (r)
            &nb= sp;    return r;
--
2.25.1

--_000_BL1PR12MB5144E85AAA1350161E0018FBF7F89BL1PR12MB5144namp_--