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* [PATCH] drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carp
@ 2021-11-02  8:51 Aaron Liu
  2021-11-02  9:18 ` Huang Rui
  0 siblings, 1 reply; 3+ messages in thread
From: Aaron Liu @ 2021-11-02  8:51 UTC (permalink / raw)
  To: amd-gfx; +Cc: Alexander.Deucher, Ray.Huang, Aaron Liu

For yellow carp, the desired CGPG hysteresis value is 0x4E20.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 90a834dc4008..b53b36f5ae92 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -8316,11 +8316,8 @@ static void gfx_v10_cntl_power_gating(struct amdgpu_device *adev, bool enable)
 	if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
 		switch (adev->ip_versions[GC_HWIP][0]) {
 		case IP_VERSION(10, 3, 1):
-			data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
-			WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);
-			break;
 		case IP_VERSION(10, 3, 3):
-			data = 0x1388 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
+			data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
 			WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);
 			break;
 		default:
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carp
  2021-11-02  8:51 [PATCH] drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carp Aaron Liu
@ 2021-11-02  9:18 ` Huang Rui
  2021-11-03  2:32   ` Liu, Aaron
  0 siblings, 1 reply; 3+ messages in thread
From: Huang Rui @ 2021-11-02  9:18 UTC (permalink / raw)
  To: Liu, Aaron; +Cc: Deucher, Alexander, amd-gfx

On Tue, Nov 02, 2021 at 04:51:18PM +0800, Liu, Aaron wrote:
> For yellow carp, the desired CGPG hysteresis value is 0x4E20.
> 
> Signed-off-by: Aaron Liu <aaron.liu@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 90a834dc4008..b53b36f5ae92 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -8316,11 +8316,8 @@ static void gfx_v10_cntl_power_gating(struct amdgpu_device *adev, bool enable)
>  	if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
>  		switch (adev->ip_versions[GC_HWIP][0]) {
>  		case IP_VERSION(10, 3, 1):
> -			data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
> -			WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);
> -			break;
>  		case IP_VERSION(10, 3, 3):
> -			data = 0x1388 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
> +			data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;

Acked-by: Huang Rui <ray.huang@amd.com>

Is this patch able to fix the cgpg issue in ROCr test?

Thanks,
Ray

^ permalink raw reply	[flat|nested] 3+ messages in thread
* RE: [PATCH] drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carp
  2021-11-02  9:18 ` Huang Rui
@ 2021-11-03  2:32   ` Liu, Aaron
  0 siblings, 0 replies; 3+ messages in thread
From: Liu, Aaron @ 2021-11-03  2:32 UTC (permalink / raw)
  To: Huang, Ray; +Cc: Deucher, Alexander, amd-gfx

[AMD Official Use Only]

Ray,

That ROCR issue is caused by CGCG(NOT CGPG).
With this patch applied, the rocr issue still exists.

--
Best Regards
Aaron Liu

> -----Original Message-----
> From: Huang, Ray <Ray.Huang@amd.com>
> Sent: Tuesday, November 2, 2021 5:19 PM
> To: Liu, Aaron <Aaron.Liu@amd.com>
> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> <Alexander.Deucher@amd.com>
> Subject: Re: [PATCH] drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us
> for yellow carp
> 
> On Tue, Nov 02, 2021 at 04:51:18PM +0800, Liu, Aaron wrote:
> > For yellow carp, the desired CGPG hysteresis value is 0x4E20.
> >
> > Signed-off-by: Aaron Liu <aaron.liu@amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +----
> >  1 file changed, 1 insertion(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> > index 90a834dc4008..b53b36f5ae92 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> > @@ -8316,11 +8316,8 @@ static void gfx_v10_cntl_power_gating(struct
> amdgpu_device *adev, bool enable)
> >  	if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) {
> >  		switch (adev->ip_versions[GC_HWIP][0]) {
> >  		case IP_VERSION(10, 3, 1):
> > -			data = 0x4E20 &
> RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
> > -			WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data);
> > -			break;
> >  		case IP_VERSION(10, 3, 3):
> > -			data = 0x1388 &
> RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
> > +			data = 0x4E20 &
> RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh;
> 
> Acked-by: Huang Rui <ray.huang@amd.com>
> 
> Is this patch able to fix the cgpg issue in ROCr test?
> 
> Thanks,
> Ray

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-11-03  2:32 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-11-02  8:51 [PATCH] drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carp Aaron Liu
2021-11-02  9:18 ` Huang Rui
2021-11-03  2:32   ` Liu, Aaron

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