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From: Wills Wang <wills.wang@live.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 5/7] mips: ath79: Unify DDR initialization entry for ar934x
Date: Sun, 22 May 2016 11:59:53 +0800	[thread overview]
Message-ID: <BLU436-SMTP22CBEFC0185155C7B27A6DFF4D0@phx.gbl> (raw)
In-Reply-To: <1463889595-15333-1-git-send-email-wills.wang@live.com>

Use function "ddr_init" for ath79 platform DDR initialization,
and put it into mach/ddr.h

Signed-off-by: Wills Wang <wills.wang@live.com>
---

 arch/mips/mach-ath79/ar933x/ddr.c         | 2 +-
 arch/mips/mach-ath79/ar934x/ddr.c         | 2 +-
 arch/mips/mach-ath79/include/mach/ath79.h | 1 -
 arch/mips/mach-ath79/include/mach/ddr.h   | 2 +-
 arch/mips/mach-ath79/qca953x/ddr.c        | 2 +-
 board/qca/ap121/ap121.c                   | 2 +-
 board/qca/ap143/ap143.c                   | 2 +-
 board/tplink/wdr4300/wdr4300.c            | 2 +-
 8 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/mips/mach-ath79/ar933x/ddr.c b/arch/mips/mach-ath79/ar933x/ddr.c
index 84e1cfa..b5940cb 100644
--- a/arch/mips/mach-ath79/ar933x/ddr.c
+++ b/arch/mips/mach-ath79/ar933x/ddr.c
@@ -103,7 +103,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DDR_TAP_VAL0            0x08
 #define DDR_TAP_VAL1            0x09
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
 {
 	void __iomem *regs;
 	u32 val;
diff --git a/arch/mips/mach-ath79/ar934x/ddr.c b/arch/mips/mach-ath79/ar934x/ddr.c
index 2ebb89b..c467fb2 100644
--- a/arch/mips/mach-ath79/ar934x/ddr.c
+++ b/arch/mips/mach-ath79/ar934x/ddr.c
@@ -35,7 +35,7 @@ static const struct ar934x_mem_config ar934x_mem_config[] = {
 	[AR934X_DDR2]  = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
 };
 
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
 {
 	void __iomem *ddr_regs;
 	const struct ar934x_mem_config *memcfg;
diff --git a/arch/mips/mach-ath79/include/mach/ath79.h b/arch/mips/mach-ath79/include/mach/ath79.h
index 18d1e26..fdc1149 100644
--- a/arch/mips/mach-ath79/include/mach/ath79.h
+++ b/arch/mips/mach-ath79/include/mach/ath79.h
@@ -141,6 +141,5 @@ static inline int soc_is_qca956x(void)
 }
 
 void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
-void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
 
 #endif /* __ASM_MACH_ATH79_H */
diff --git a/arch/mips/mach-ath79/include/mach/ddr.h b/arch/mips/mach-ath79/include/mach/ddr.h
index 181179a..b6f46ce 100644
--- a/arch/mips/mach-ath79/include/mach/ddr.h
+++ b/arch/mips/mach-ath79/include/mach/ddr.h
@@ -7,7 +7,7 @@
 #ifndef __ASM_MACH_DDR_H
 #define __ASM_MACH_DDR_H
 
-void ddr_init(void);
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz);
 void ddr_tap_tuning(void);
 
 #endif /* __ASM_MACH_DDR_H */
diff --git a/arch/mips/mach-ath79/qca953x/ddr.c b/arch/mips/mach-ath79/qca953x/ddr.c
index 41ad113..180e600 100644
--- a/arch/mips/mach-ath79/qca953x/ddr.c
+++ b/arch/mips/mach-ath79/qca953x/ddr.c
@@ -219,7 +219,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DDR_TAP_MAGIC_VAL       0xaa55aa55
 #define DDR_TAP_MAX_VAL         0x40
 
-void ddr_init(void)
+void ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 bus_mhz)
 {
 	void __iomem *regs;
 	u32 val;
diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
index d6c60fe..b0e1993 100644
--- a/board/qca/ap121/ap121.c
+++ b/board/qca/ap121/ap121.c
@@ -45,6 +45,6 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
-	ddr_init();
+	ddr_init(400, 400, 200);
 	return 0;
 }
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
index 1572472..406c988 100644
--- a/board/qca/ap143/ap143.c
+++ b/board/qca/ap143/ap143.c
@@ -61,6 +61,6 @@ int board_early_init_f(void)
 #ifdef CONFIG_DEBUG_UART
 	debug_uart_init();
 #endif
-	ddr_init();
+	ddr_init(650, 400, 200);
 	return 0;
 }
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
index 8382ce0..bff3938 100644
--- a/board/tplink/wdr4300/wdr4300.c
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -64,7 +64,7 @@ int board_early_init_f(void)
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 	ar934x_pll_init(560, 480, 240);
-	ar934x_ddr_init(560, 480, 240);
+	ddr_init(560, 480, 240);
 #endif
 
 	wdr4300_usb_start();
-- 
1.9.1

  parent reply	other threads:[~2016-05-22  3:59 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1463889595-15333-1-git-send-email-wills.wang@live.com>
2016-05-22  3:59 ` [U-Boot] [PATCH V2 2/7] mips: ath79: ar933x: Fix ethernet PHY mismatch Wills Wang
2016-05-22 11:05   ` Marek Vasut
2016-05-22 11:20     ` Wills Wang
2016-05-25 23:29   ` Daniel Schwierzeck
2016-05-22  3:59 ` [U-Boot] [PATCH 3/7] mips: ath79: Use uniform header for reset Wills Wang
2016-05-22 11:08   ` Marek Vasut
2016-05-22 11:29     ` Wills Wang
2016-05-22 11:32       ` Marek Vasut
2016-05-30 10:10         ` Daniel Schwierzeck
2016-05-22  3:59 ` [U-Boot] [PATCH 4/7] mips: ath79: Rename get_bootstrap into ath79_get_bootstrap Wills Wang
2016-05-22 11:09   ` Marek Vasut
2016-05-22  3:59 ` Wills Wang [this message]
2016-05-22 11:13   ` [U-Boot] [PATCH 5/7] mips: ath79: Unify DDR initialization entry for ar934x Marek Vasut
2016-05-22 11:35     ` Wills Wang
2016-05-22 12:23       ` Marek Vasut
2016-05-22  3:59 ` [U-Boot] [PATCH 6/7] mips: ath79: Unify PLL initialization entry Wills Wang
2016-05-22 11:14   ` Marek Vasut
2016-05-22  3:59 ` [U-Boot] [PATCH 7/7] mips: ath79: ap121: Enable ethernet Wills Wang
2016-05-22 11:14   ` Marek Vasut

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