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Date: Fri, 13 Nov 2015 00:12:08 +0800
From: Chen Gang <xili_gchen_5257@hotmail.com>
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Subject: Re: [Qemu-devel] [PATCH 2/4] target-tilegx: Implement fpu single
 floating point
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To: Richard Henderson <rth@twiddle.net>, Peter Maydell <peter.maydell@linaro.org>, Chris Metcalf <cmetcalf@ezchip.com>
Cc: qemu-devel <qemu-devel@nongnu.org>

On 11/12/15 22:36=2C Richard Henderson wrote:
>> +    if (sfmt.calc =3D=3D TILEGX_F_CALC_CVT) {
>> +        if (sfmt.sign)
>> +            f.f =3D int32_to_float32(0 - sfmt.mantissa=2C fp_status)=3B
>> +        else
>> +            f.f =3D uint32_to_float32(sfmt.mantissa=2C fp_status)=3B
>> +    } else {
>=20
> Formatting.
>=20
> You really should know better by now.
> I'm not even going to look at the rest.
>=20

Excuse me=2C my English is not quite well=2C I am not quite understand your
meaning.

Does the code above have issues?

Thanks.
--=20
Chen Gang (=E9=99=88=E5=88=9A)

Open=2C share=2C and attitude like air=2C water=2C and life which God bless=
ed