From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751972AbbDSAER (ORCPT ); Sat, 18 Apr 2015 20:04:17 -0400 Received: from blu004-omc1s21.hotmail.com ([65.55.116.32]:50703 "EHLO BLU004-OMC1S21.hotmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750879AbbDSAEP (ORCPT ); Sat, 18 Apr 2015 20:04:15 -0400 X-TMN: [Xz94P8+LLB7e0S8iCde5AiNosVpxqrtb] X-Originating-Email: [yorick-rommers@hotmail.com] Message-ID: From: Yorick Rommers To: gregkh@linuxfoundation.org, markh@compro.net, lidza.louina@gmail.com CC: driverdev-devel@linuxdriverproject.org, linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org, Yorick Rommers Subject: [PATCH 2/2] Staging: dgnc: fixed code style issues, mainly line width issues. Date: Sun, 19 Apr 2015 02:04:39 +0200 X-Mailer: git-send-email 2.3.5 X-OriginalArrivalTime: 19 Apr 2015 00:04:13.0407 (UTC) FILETIME=[5E6156F0:01D07A34] MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org A patch for dgnc_mgmt.c and dgnc_neo.c to fix some code style issues. Signed-off-by: Yorick Rommers --- drivers/staging/dgnc/dgnc_mgmt.c | 4 +- drivers/staging/dgnc/dgnc_neo.c | 210 +++++++++++++++++++++++++++------------ 2 files changed, 151 insertions(+), 63 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_mgmt.c b/drivers/staging/dgnc/dgnc_mgmt.c index b13318a..2385da8 100644 --- a/drivers/staging/dgnc/dgnc_mgmt.c +++ b/drivers/staging/dgnc/dgnc_mgmt.c @@ -148,7 +148,9 @@ long dgnc_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) di.info_bdstate = dgnc_Board[brd]->dpastatus; di.info_ioport = 0; di.info_physaddr = (ulong) dgnc_Board[brd]->membase; - di.info_physsize = (ulong) dgnc_Board[brd]->membase - dgnc_Board[brd]->membase_end; + di.info_physsize = + (ulong) dgnc_Board[brd]->membase - dgnc_Board[brd]->membase_end; + if (dgnc_Board[brd]->state != BOARD_FAILED) di.info_nports = dgnc_Board[brd]->nasync; else diff --git a/drivers/staging/dgnc/dgnc_neo.c b/drivers/staging/dgnc/dgnc_neo.c index f5a4d36..23afd78 100644 --- a/drivers/staging/dgnc/dgnc_neo.c +++ b/drivers/staging/dgnc/dgnc_neo.c @@ -79,7 +79,8 @@ struct board_ops dgnc_neo_ops = { .send_immediate_char = neo_send_immediate_char }; -static uint dgnc_offset_table[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 }; +static uint dgnc_offset_table[8] = { 0x01, 0x02, 0x04, 0x08, +0x10, 0x20, 0x40, 0x80 }; /* @@ -113,14 +114,18 @@ static inline void neo_set_cts_flow_control(struct channel_t *ch) /* Turn off auto Xon flow control */ efr &= ~UART_17158_EFR_IXON; - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* + * Why? + * Becuz Exar's spec says we have to zero it out before setting it + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), + &ch->ch_neo_uart->fctr); /* Feed the UART our trigger levels */ writeb(8, &ch->ch_neo_uart->tfifo); @@ -149,13 +154,17 @@ static inline void neo_set_rts_flow_control(struct channel_t *ch) ier &= ~UART_17158_IER_XOFF; efr &= ~UART_17158_EFR_IXOFF; - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* + * Why? + * Becuz Exar's spec says we have to zero it out before setting it + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_4DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 4; writeb(32, &ch->ch_neo_uart->rfifo); @@ -187,13 +196,17 @@ static inline void neo_set_ixon_flow_control(struct channel_t *ch) /* Turn on auto Xon flow control */ efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXON); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* + * Why? + * Becuz Exar's spec says we have to zero it out before setting it + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 4; writeb(32, &ch->ch_neo_uart->rfifo); @@ -225,14 +238,18 @@ static inline void neo_set_ixoff_flow_control(struct channel_t *ch) ier |= UART_17158_IER_XOFF; efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXOFF); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* + * Why? + * Becuz Exar's spec says we have to zero it out before setting it + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); writeb(8, &ch->ch_neo_uart->tfifo); ch->ch_t_tlevel = 8; @@ -267,14 +284,18 @@ static inline void neo_set_no_input_flow_control(struct channel_t *ch) efr &= ~(UART_17158_EFR_ECB | UART_17158_EFR_IXOFF); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* + * Why? + * Becuz Exar's spec says we have to zero it out before setting it + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 0; @@ -305,14 +326,18 @@ static inline void neo_set_no_output_flow_control(struct channel_t *ch) else efr &= ~(UART_17158_EFR_ECB | UART_17158_EFR_IXON); - /* Why? Becuz Exar's spec says we have to zero it out before setting it */ + /* + * Why? + * Becuz Exar's spec says we have to zero it out before setting it + */ writeb(0, &ch->ch_neo_uart->efr); /* Turn on UART enhanced bits */ writeb(efr, &ch->ch_neo_uart->efr); /* Turn on table D, with 8 char hi/low watermarks */ - writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), &ch->ch_neo_uart->fctr); + writeb((UART_17158_FCTR_TRGD | UART_17158_FCTR_RTS_8DELAY), + &ch->ch_neo_uart->fctr); ch->ch_r_watermark = 0; @@ -333,7 +358,8 @@ static inline void neo_set_new_start_stop_chars(struct channel_t *ch) { /* if hardware flow control is set, then skip this whole thing */ - if (ch->ch_digi.digi_flags & (CTSPACE | RTSPACE) || ch->ch_c_cflag & CRTSCTS) + if (ch->ch_digi.digi_flags & + (CTSPACE | RTSPACE) || ch->ch_c_cflag & CRTSCTS) return; /* Tell UART what start/stop chars it should be looking for */ @@ -408,7 +434,8 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) break; /* - * Yank off the upper 2 bits, which just show that the FIFO's are enabled. + * Yank off the upper 2 bits, + * which just show that the FIFO's are enabled. */ isr &= ~(UART_17158_IIR_FIFO_ENABLED); @@ -418,7 +445,10 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) ch->ch_intr_rx++; neo_copy_data_from_uart_to_queue(ch); - /* Call our tty layer to enforce queue flow control if needed. */ + /* + * Call our tty layer to enforce queue + * flow control if needed. + */ spin_lock_irqsave(&ch->ch_lock, flags); dgnc_check_queue_flow_control(ch); spin_unlock_irqrestore(&ch->ch_lock, flags); @@ -443,7 +473,9 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) * one it was, so we can suspend or resume data flow. */ if (cause == UART_17158_XON_DETECT) { - /* Is output stopped right now, if so, resume it */ + /* Is output stopped right now, + * if so, resume it + */ if (brd->channels[port]->ch_flags & CH_STOP) { spin_lock_irqsave(&ch->ch_lock, flags); @@ -452,7 +484,8 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) flags); } } else if (cause == UART_17158_XOFF_DETECT) { - if (!(brd->channels[port]->ch_flags & CH_STOP)) { + if (!(brd->channels[port]->ch_flags + & CH_STOP)) { spin_lock_irqsave(&ch->ch_lock, flags); ch->ch_flags |= CH_STOP; @@ -464,8 +497,9 @@ static inline void neo_parse_isr(struct dgnc_board *brd, uint port) if (isr & UART_17158_IIR_HWFLOW_STATE_CHANGE) { /* - * If we get here, this means the hardware is doing auto flow control. - * Check to see whether RTS/DTR or CTS/DSR caused this interrupt. + * If we get here, this means the hardware is + * doing auto flow control. Check to see whether + * RTS/DTR or CTS/DSR caused this interrupt. */ brd->intr_modem++; ch->ch_intr_modem++; @@ -561,7 +595,8 @@ static inline void neo_parse_lsr(struct dgnc_board *brd, uint port) * Rx Oruns. Exar says that an orun will NOT corrupt * the FIFO. It will just replace the holding register * with this new data byte. So basically just ignore this. - * Probably we should eventually have an orun stat in our driver... + * Probably we should eventually have an orun + * stat in our driver... */ ch->ch_err_overrun++; } @@ -683,8 +718,12 @@ static void neo_param(struct tty_struct *tty) 4800, 9600, 19200, 38400 } }; - /* Only use the TXPrint baud rate if the terminal unit is NOT open */ - if (!(ch->ch_tun.un_flags & UN_ISOPEN) && (un->un_type == DGNC_PRINT)) + /* + * Only use the TXPrint baud rate if the + * terminal unit is NOT open + */ + if (!(ch->ch_tun.un_flags & UN_ISOPEN) && + (un->un_type == DGNC_PRINT)) baud = C_BAUD(ch->ch_pun.un_tty) & 0xff; else baud = C_BAUD(ch->ch_tun.un_tty) & 0xff; @@ -697,7 +736,8 @@ static void neo_param(struct tty_struct *tty) jindex = baud; - if ((iindex >= 0) && (iindex < 4) && (jindex >= 0) && (jindex < 16)) + if ((iindex >= 0) && (iindex < 4) && + (jindex >= 0) && (jindex < 16)) baud = bauds[iindex][jindex]; else baud = 0; @@ -804,8 +844,12 @@ static void neo_param(struct tty_struct *tty) if (ch->ch_digi.digi_flags & CTSPACE || ch->ch_c_cflag & CRTSCTS) { neo_set_cts_flow_control(ch); } else if (ch->ch_c_iflag & IXON) { - /* If start/stop is set to disable, then we should disable flow control */ - if ((ch->ch_startc == _POSIX_VDISABLE) || (ch->ch_stopc == _POSIX_VDISABLE)) + /* + * If start/stop is set to disable, + * then we should disable flow control + */ + if ((ch->ch_startc == _POSIX_VDISABLE) || + (ch->ch_stopc == _POSIX_VDISABLE)) neo_set_no_output_flow_control(ch); else neo_set_ixon_flow_control(ch); @@ -816,8 +860,11 @@ static void neo_param(struct tty_struct *tty) if (ch->ch_digi.digi_flags & RTSPACE || ch->ch_c_cflag & CRTSCTS) { neo_set_rts_flow_control(ch); } else if (ch->ch_c_iflag & IXOFF) { - /* If start/stop is set to disable, then we should disable flow control */ - if ((ch->ch_startc == _POSIX_VDISABLE) || (ch->ch_stopc == _POSIX_VDISABLE)) + /* If start/stop is set to disable, + * then we should disable flow control + */ + if ((ch->ch_startc == _POSIX_VDISABLE) || + (ch->ch_stopc == _POSIX_VDISABLE)) neo_set_no_input_flow_control(ch); else neo_set_ixoff_flow_control(ch); @@ -959,14 +1006,17 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) /* * If 0, no interrupts pending. - * This can happen if the IRQ is shared among a couple Neo/Classic boards. + * This can happen if the IRQ is shared among + * a couple Neo/Classic boards. */ if (!uart_poll) { spin_unlock_irqrestore(&brd->bd_intr_lock, flags); return IRQ_NONE; } - /* At this point, we have at least SOMETHING to service, dig further... */ + /* At this point, we have at least SOMETHING + * to service, dig further... + */ current_port = 0; @@ -989,7 +1039,9 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) uart_poll &= ~(dgnc_offset_table[port]); if (!type) { - /* If no type, just ignore it, and move onto next port */ + /* If no type, just ignore it, + * and move onto next port + */ continue; } @@ -1009,7 +1061,9 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) ch = brd->channels[port]; neo_copy_data_from_uart_to_queue(ch); - /* Call our tty layer to enforce queue flow control if needed. */ + /* Call our tty layer to enforce queue + * flow control if needed. + */ spin_lock_irqsave(&ch->ch_lock, flags2); dgnc_check_queue_flow_control(ch); spin_unlock_irqrestore(&ch->ch_lock, flags2); @@ -1025,16 +1079,19 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) case UART_17158_TXRDY: /* - * TXRDY interrupt clears after reading ISR register for the UART channel. + * TXRDY interrupt clears after reading + * ISR register for the UART channel. */ /* * Yes, this is odd... * Why would I check EVERY possibility of type of * interrupt, when we know its TXRDY??? - * Becuz for some reason, even tho we got triggered for TXRDY, - * it seems to be occasionally wrong. Instead of TX, which - * it should be, I was getting things like RXDY too. Weird. + * Becuz for some reason, even tho we got + * triggered for TXRDY, it seems to be + * occasionally wrong. Instead of TX, which it + * should be, I was getting things like RXDY too. + * Weird. */ neo_parse_isr(brd, port); continue; @@ -1049,8 +1106,8 @@ static irqreturn_t neo_intr(int irq, void *voidbrd) default: /* * The UART triggered us with a bogus interrupt type. - * It appears the Exar chip, when REALLY bogged down, will throw - * these once and awhile. + * It appears the Exar chip, when REALLY bogged down, + * will throw these once and awhile. * Its harmless, just ignore it and move on. */ continue; @@ -1200,7 +1257,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) linestatus = 0; /* Copy data from uart to the queue */ - memcpy_fromio(ch->ch_rqueue + head, &ch->ch_neo_uart->txrxburst, n); + memcpy_fromio(ch->ch_rqueue + head, + &ch->ch_neo_uart->txrxburst, n); /* * Since RX_FIFO_DATA_ERROR was 0, we are guarenteed @@ -1254,7 +1312,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) * we don't miss our TX FIFO emptys. */ if (linestatus & (UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR)) { - linestatus &= ~(UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR); + linestatus &= + ~(UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR); ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM); } @@ -1270,7 +1329,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) } /* - * If our queue is full, we have no choice but to drop some data. + * If our queue is full, + * we have no choice but to drop some data. * The assumption is that HWFLOW or SWFLOW should have stopped * things way way before we got to this point. * @@ -1284,7 +1344,8 @@ static void neo_copy_data_from_uart_to_queue(struct channel_t *ch) qleft++; } - memcpy_fromio(ch->ch_rqueue + head, &ch->ch_neo_uart->txrxburst, 1); + memcpy_fromio(ch->ch_rqueue + head, + &ch->ch_neo_uart->txrxburst, 1); ch->ch_equeue[head] = (unsigned char) linestatus; /* Ditch any remaining linestatus value. */ @@ -1339,7 +1400,8 @@ static int neo_drain(struct tty_struct *tty, uint seconds) * * NOTE: TODO: Do something with time passed in. */ - rc = wait_event_interruptible(un->un_flags_wait, ((un->un_flags & UN_EMPTY) == 0)); + rc = wait_event_interruptible(un->un_flags_wait, + ((un->un_flags & UN_EMPTY) == 0)); /* If ret is non-zero, user ctrl-c'ed us */ return rc; @@ -1359,12 +1421,16 @@ static void neo_flush_uart_write(struct channel_t *ch) if (!ch || ch->magic != DGNC_CHANNEL_MAGIC) return; - writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT), &ch->ch_neo_uart->isr_fcr); + writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_XMIT), + &ch->ch_neo_uart->isr_fcr); neo_pci_posting_flush(ch->ch_bd); for (i = 0; i < 10; i++) { - /* Check to see if the UART feels it completely flushed the FIFO. */ + /* + * Check to see if the UART feels it + * completely flushed the FIFO. + */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 4) udelay(10); @@ -1389,12 +1455,16 @@ static void neo_flush_uart_read(struct channel_t *ch) if (!ch || ch->magic != DGNC_CHANNEL_MAGIC) return; - writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR), &ch->ch_neo_uart->isr_fcr); + writeb((UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR), + &ch->ch_neo_uart->isr_fcr); neo_pci_posting_flush(ch->ch_bd); for (i = 0; i < 10; i++) { - /* Check to see if the UART feels it completely flushed the FIFO. */ + /* + * Check to see if the UART feels it completely + * flushed the FIFO. + */ tmp = readb(&ch->ch_neo_uart->isr_fcr); if (tmp & 2) udelay(10); @@ -1440,8 +1510,10 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_cached_lsr &= ~(UART_LSR_THRE); /* - * If RTS Toggle mode is on, turn on RTS now if not already set, - * and make sure we get an event when the data transfer has completed. + * If RTS Toggle mode is on, + * turn on RTS now if not already set, + * and make sure we get an event + * when the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_RTS)) { @@ -1451,8 +1523,10 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_tun.un_flags |= (UN_EMPTY); } /* - * If DTR Toggle mode is on, turn on DTR now if not already set, - * and make sure we get an event when the data transfer has completed. + * If DTR Toggle mode is on, + * turn on DTR now if not already set, + * and make sure we get an event + * when the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_DTR)) { @@ -1462,7 +1536,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_tun.un_flags |= (UN_EMPTY); } - writeb(ch->ch_wqueue[ch->ch_w_tail], &ch->ch_neo_uart->txrx); + writeb(ch->ch_wqueue[ch->ch_w_tail], + &ch->ch_neo_uart->txrx); ch->ch_w_tail++; ch->ch_w_tail &= WQUEUEMASK; ch->ch_txcount++; @@ -1507,8 +1582,10 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) break; /* - * If RTS Toggle mode is on, turn on RTS now if not already set, - * and make sure we get an event when the data transfer has completed. + * If RTS Toggle mode is on, + * turn on RTS now if not already set, + * and make sure we get an event + * when the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_RTS_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_RTS)) { @@ -1519,8 +1596,10 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) } /* - * If DTR Toggle mode is on, turn on DTR now if not already set, - * and make sure we get an event when the data transfer has completed. + * If DTR Toggle mode is on, + * turn on DTR now if not already set, + * and make sure we get an event + * when the data transfer has completed. */ if (ch->ch_digi.digi_flags & DIGI_DTR_TOGGLE) { if (!(ch->ch_mostat & UART_MCR_DTR)) { @@ -1530,7 +1609,8 @@ static void neo_copy_data_from_queue_to_uart(struct channel_t *ch) ch->ch_tun.un_flags |= (UN_EMPTY); } - memcpy_toio(&ch->ch_neo_uart->txrxburst, ch->ch_wqueue + tail, s); + memcpy_toio(&ch->ch_neo_uart->txrxburst, + ch->ch_wqueue + tail, s); /* Add and flip queue if needed */ tail = (tail + s) & WQUEUEMASK; @@ -1584,7 +1664,10 @@ static void neo_parse_modem(struct channel_t *ch, unsigned char signals) } } - /* Scrub off lower bits. They signify delta's, which I don't care about */ + /* + * Scrub off lower bits. + * They signify delta's, which I don't care about + * */ msignals &= 0xf0; if (msignals & UART_MSR_DCD) @@ -1671,7 +1754,8 @@ static void neo_uart_init(struct channel_t *ch) /* Clear out UART and FIFO */ readb(&ch->ch_neo_uart->txrx); - writeb((UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|UART_FCR_CLEAR_XMIT), &ch->ch_neo_uart->isr_fcr); + writeb((UART_FCR_ENABLE_FIFO|UART_FCR_CLEAR_RCVR|UART_FCR_CLEAR_XMIT), + &ch->ch_neo_uart->isr_fcr); readb(&ch->ch_neo_uart->lsr); readb(&ch->ch_neo_uart->msr); @@ -1773,7 +1857,8 @@ static void neo_send_immediate_char(struct channel_t *ch, unsigned char c) } -static unsigned int neo_read_eeprom(unsigned char __iomem *base, unsigned int address) +static unsigned int neo_read_eeprom(unsigned char __iomem *base, + unsigned int address) { unsigned int enable; unsigned int bits; @@ -1832,8 +1917,9 @@ static void neo_vpd(struct dgnc_board *brd) brd->vpd[(i*2)+1] = (a >> 8) & 0xff; } - if (((brd->vpd[0x08] != 0x82) /* long resource name tag */ - && (brd->vpd[0x10] != 0x82)) /* long resource name tag (PCI-66 files)*/ + if (((brd->vpd[0x08] != 0x82) /* long resource name tag */ + && (brd->vpd[0x10] != 0x82)) /* long resource name tag + (PCI-66 files)*/ || (brd->vpd[0x7F] != 0x78)) { /* small resource end tag */ memset(brd->vpd, '\0', NEO_VPD_IMAGESIZE); -- 2.3.5