From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Deucher, Alexander" Subject: Re: [PATCH 2/2] drm/amd/powerplay: support sw smu hotspot and memory temperature retrieval Date: Tue, 14 May 2019 14:20:16 +0000 Message-ID: References: <20190514111922.21780-1-evan.quan@amd.com>, <20190514111922.21780-2-evan.quan@amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0286548877==" Return-path: In-Reply-To: <20190514111922.21780-2-evan.quan-5C7GfCeVMHo@public.gmane.org> Content-Language: en-US List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: "Quan, Evan" , "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org" --===============0286548877== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_BN6PR12MB180993535A9C4563EBAA66B6F7080BN6PR12MB1809namp_" --_000_BN6PR12MB180993535A9C4563EBAA66B6F7080BN6PR12MB1809namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Series is: Reviewed-by: Alex Deucher ________________________________ From: amd-gfx on behalf of Evan Qua= n Sent: Tuesday, May 14, 2019 7:19 AM To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Quan, Evan Subject: [PATCH 2/2] drm/amd/powerplay: support sw smu hotspot and memory t= emperature retrieval [CAUTION: External Email] Support hotspot and memory temperature retrieval on sw smu routine. Change-Id: If2ed1e2835f4b158a4a6d93aee8b358af18b9bfc Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 3 + drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 74 ++++++++++++++++--- 2 files changed, 66 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/dr= m/amd/powerplay/inc/smu_v11_0.h index aa8d81f4111e..02c965d64256 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h @@ -36,6 +36,9 @@ #define smnMP0_FW_INTF 0x30101c0 #define smnMP1_PUB_CTRL 0x3010b14 +#define TEMP_RANGE_MIN (0) +#define TEMP_RANGE_MAX (80 * 1000) + struct smu_11_0_max_sustainable_clocks { uint32_t display_clock; uint32_t phy_clock; diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/am= d/powerplay/smu_v11_0.c index 738ae1d2ef17..0eea93c8dff7 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -1011,9 +1011,20 @@ static int smu_v11_0_get_current_clk_freq(struct smu= _context *smu, uint32_t clk_ static int smu_v11_0_get_thermal_range(struct smu_context *smu, struct PP_TemperatureRange *range) { + PPTable_t *pptable =3D smu->smu_table.driver_pptable; memcpy(range, &SMU7ThermalWithDelayPolicy[0], sizeof(struct PP_Temp= eratureRange)); - range->max =3D smu->smu_table.software_shutdown_temp * + range->max =3D pptable->TedgeLimit * + PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + range->edge_emergency_max =3D (pptable->TedgeLimit + CTF_OFFSET_EDG= E) * + PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + range->hotspot_crit_max =3D pptable->ThotspotLimit * + PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + range->hotspot_emergency_max =3D (pptable->ThotspotLimit + CTF_OFFS= ET_HOTSPOT) * + PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + range->mem_crit_max =3D pptable->ThbmLimit * + PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + range->mem_emergency_max =3D (pptable->ThbmLimit + CTF_OFFSET_HBM)* PP_TEMPERATURE_UNITS_PER_CENTIGRADES; return 0; @@ -1078,7 +1089,16 @@ static int smu_v11_0_set_thermal_fan_table(struct sm= u_context *smu) static int smu_v11_0_start_thermal_control(struct smu_context *smu) { int ret =3D 0; - struct PP_TemperatureRange range; + struct PP_TemperatureRange range =3D { + TEMP_RANGE_MIN, + TEMP_RANGE_MAX, + TEMP_RANGE_MAX, + TEMP_RANGE_MIN, + TEMP_RANGE_MAX, + TEMP_RANGE_MAX, + TEMP_RANGE_MIN, + TEMP_RANGE_MAX, + TEMP_RANGE_MAX}; struct amdgpu_device *adev =3D smu->adev; smu_v11_0_get_thermal_range(smu, &range); @@ -1098,6 +1118,13 @@ static int smu_v11_0_start_thermal_control(struct sm= u_context *smu) adev->pm.dpm.thermal.min_temp =3D range.min; adev->pm.dpm.thermal.max_temp =3D range.max; + adev->pm.dpm.thermal.max_edge_emergency_temp =3D range.edge_emergen= cy_max; + adev->pm.dpm.thermal.min_hotspot_temp =3D range.hotspot_min; + adev->pm.dpm.thermal.max_hotspot_crit_temp =3D range.hotspot_crit_m= ax; + adev->pm.dpm.thermal.max_hotspot_emergency_temp =3D range.hotspot_e= mergency_max; + adev->pm.dpm.thermal.min_mem_temp =3D range.mem_min; + adev->pm.dpm.thermal.max_mem_crit_temp =3D range.mem_crit_max; + adev->pm.dpm.thermal.max_mem_emergency_temp =3D range.mem_emergency= _max; return ret; } @@ -1151,22 +1178,45 @@ static int smu_v11_0_get_current_activity_percent(s= truct smu_context *smu, return 0; } -static int smu_v11_0_thermal_get_temperature(struct smu_context *smu, uint= 32_t *value) +static int smu_v11_0_thermal_get_temperature(struct smu_context *smu, + enum amd_pp_sensors sensor, + uint32_t *value) { struct amdgpu_device *adev =3D smu->adev; + SmuMetrics_t metrics; uint32_t temp =3D 0; + int ret =3D 0; if (!value) return -EINVAL; - temp =3D RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS); - temp =3D (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >> - CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT; + ret =3D smu_v11_0_get_metrics_table(smu, &metrics); + if (ret) + return ret; + + switch (sensor) { + case AMDGPU_PP_SENSOR_HOTSPOT_TEMP: + temp =3D RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS); + temp =3D (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >> + CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT; - temp =3D temp & 0x1ff; - temp *=3D SMU11_TEMPERATURE_UNITS_PER_CENTIGRADES; + temp =3D temp & 0x1ff; + temp *=3D SMU11_TEMPERATURE_UNITS_PER_CENTIGRADES; - *value =3D temp; + *value =3D temp; + break; + case AMDGPU_PP_SENSOR_EDGE_TEMP: + *value =3D metrics.TemperatureEdge * + PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + break; + case AMDGPU_PP_SENSOR_MEM_TEMP: + *value =3D metrics.TemperatureHBM * + PP_TEMPERATURE_UNITS_PER_CENTIGRADES; + break; + default: + pr_err("Invalid sensor for retrieving temp\n"); + return -EINVAL; + } return 0; } @@ -1235,8 +1285,10 @@ static int smu_v11_0_read_sensor(struct smu_context = *smu, ret =3D smu_get_current_clk_freq(smu, PPCLK_GFXCLK, (uint32= _t *)data); *size =3D 4; break; - case AMDGPU_PP_SENSOR_GPU_TEMP: - ret =3D smu_v11_0_thermal_get_temperature(smu, (uint32_t *)= data); + case AMDGPU_PP_SENSOR_HOTSPOT_TEMP: + case AMDGPU_PP_SENSOR_EDGE_TEMP: + case AMDGPU_PP_SENSOR_MEM_TEMP: + ret =3D smu_v11_0_thermal_get_temperature(smu, sensor, (uin= t32_t *)data); *size =3D 4; break; case AMDGPU_PP_SENSOR_GPU_POWER: -- 2.21.0 _______________________________________________ amd-gfx mailing list amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx --_000_BN6PR12MB180993535A9C4563EBAA66B6F7080BN6PR12MB1809namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Series is:
Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
From: amd-gfx <amd-gfx-b= ounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Evan Quan <evan.quan@amd.c= om>
Sent: Tuesday, May 14, 2019 7:19 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Quan, Evan
Subject: [PATCH 2/2] drm/amd/powerplay: support sw smu hotspot and m= emory temperature retrieval
 
[CAUTION: External Email]

Support hotspot and memory temperature retrieval on sw smu routine.

Change-Id: If2ed1e2835f4b158a4a6d93aee8b358af18b9bfc
Signed-off-by: Evan Quan <evan.quan-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h |  3 +
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c     | 7= 4 ++++++++++++++= 3;+---
 2 files changed, 66 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/dr= m/amd/powerplay/inc/smu_v11_0.h
index aa8d81f4111e..02c965d64256 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
@@ -36,6 +36,9 @@
 #define smnMP0_FW_INTF        = ;         0x30101c0
 #define smnMP1_PUB_CTRL       &nbs= p;            &= nbsp;   0x3010b14

+#define TEMP_RANGE_MIN        =          (0)
+#define TEMP_RANGE_MAX        =          (80 * 1000)
+
 struct smu_11_0_max_sustainable_clocks {
        uint32_t display_clock;
        uint32_t phy_clock;
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/am= d/powerplay/smu_v11_0.c
index 738ae1d2ef17..0eea93c8dff7 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -1011,9 +1011,20 @@ static int smu_v11_0_get_current_clk_freq(struct= smu_context *smu, uint32_t clk_
 static int smu_v11_0_get_thermal_range(struct smu_context *smu,
            &nb= sp;            =        struct PP_TemperatureRange *range)
 {
+       PPTable_t *pptable =3D smu->sm= u_table.driver_pptable;
        memcpy(range, &SMU7ThermalWi= thDelayPolicy[0], sizeof(struct PP_TemperatureRange));

-       range->max =3D smu->smu_table.s= oftware_shutdown_temp *
+       range->max =3D pptable->Ted= geLimit *
+           &nbs= p;   PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+       range->edge_emergency_max =3D = (pptable->TedgeLimit + CTF_OFFSET_EDGE) *
+           &nbs= p;   PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+       range->hotspot_crit_max =3D pp= table->ThotspotLimit *
+           &nbs= p;   PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+       range->hotspot_emergency_max = =3D (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) *
+           &nbs= p;   PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+       range->mem_crit_max =3D pptabl= e->ThbmLimit *
+           &nbs= p;   PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+       range->mem_emergency_max =3D (= pptable->ThbmLimit + CTF_OFFSET_HBM)*
            &nb= sp;   PP_TEMPERATURE_UNITS_PER_CENTIGRADES;

        return 0;
@@ -1078,7 +1089,16 @@ static int smu_v11_0_set_thermal_fan_table(struc= t smu_context *smu)
 static int smu_v11_0_start_thermal_control(struct smu_context *smu)  {
        int ret =3D 0;
-       struct PP_TemperatureRange range;
+       struct PP_TemperatureRange range = =3D {
+           &nbs= p;   TEMP_RANGE_MIN,
+           &nbs= p;   TEMP_RANGE_MAX,
+           &nbs= p;   TEMP_RANGE_MAX,
+           &nbs= p;   TEMP_RANGE_MIN,
+           &nbs= p;   TEMP_RANGE_MAX,
+           &nbs= p;   TEMP_RANGE_MAX,
+           &nbs= p;   TEMP_RANGE_MIN,
+           &nbs= p;   TEMP_RANGE_MAX,
+           &nbs= p;   TEMP_RANGE_MAX};
        struct amdgpu_device *adev =3D s= mu->adev;

        smu_v11_0_get_thermal_range(smu,= &range);
@@ -1098,6 +1118,13 @@ static int smu_v11_0_start_thermal_control(struc= t smu_context *smu)

        adev->pm.dpm.thermal.min_temp= =3D range.min;
        adev->pm.dpm.thermal.max_temp= =3D range.max;
+       adev->pm.dpm.thermal.max_edge_= emergency_temp =3D range.edge_emergency_max;
+       adev->pm.dpm.thermal.min_hotsp= ot_temp =3D range.hotspot_min;
+       adev->pm.dpm.thermal.max_hotsp= ot_crit_temp =3D range.hotspot_crit_max;
+       adev->pm.dpm.thermal.max_hotsp= ot_emergency_temp =3D range.hotspot_emergency_max;
+       adev->pm.dpm.thermal.min_mem_t= emp =3D range.mem_min;
+       adev->pm.dpm.thermal.max_mem_c= rit_temp =3D range.mem_crit_max;
+       adev->pm.dpm.thermal.max_mem_e= mergency_temp =3D range.mem_emergency_max;

        return ret;
 }
@@ -1151,22 +1178,45 @@ static int smu_v11_0_get_current_activity_perce= nt(struct smu_context *smu,
        return 0;
 }

-static int smu_v11_0_thermal_get_temperature(struct smu_context *smu, uint= 32_t *value)
+static int smu_v11_0_thermal_get_temperature(struct smu_context *smu,<= br> +           &nbs= p;            &= nbsp;           &nbs= p;       enum amd_pp_sensors sensor,
+           &nbs= p;            &= nbsp;           &nbs= p;       uint32_t *value)
 {
        struct amdgpu_device *adev =3D s= mu->adev;
+       SmuMetrics_t metrics;
        uint32_t temp =3D 0;
+       int ret =3D 0;

        if (!value)
            &nb= sp;   return -EINVAL;

-       temp =3D RREG32_SOC15(THM, 0, mmCG_MU= LT_THERMAL_STATUS);
-       temp =3D (temp & CG_MULT_THERMAL_= STATUS__CTF_TEMP_MASK) >>
-            &n= bsp;          CG_MULT_THERMAL_= STATUS__CTF_TEMP__SHIFT;
+       ret =3D smu_v11_0_get_metrics_tab= le(smu, &metrics);
+       if (ret)
+           &nbs= p;   return ret;
+
+       switch (sensor) {
+       case AMDGPU_PP_SENSOR_HOTSPOT_TEM= P:
+           &nbs= p;   temp =3D RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS);
+           &nbs= p;   temp =3D (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) = >>
+           &nbs= p;            &= nbsp;      CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT= ;

-       temp =3D temp & 0x1ff;
-       temp *=3D SMU11_TEMPERATURE_UNITS_PER= _CENTIGRADES;
+           &nbs= p;   temp =3D temp & 0x1ff;
+           &nbs= p;   temp *=3D SMU11_TEMPERATURE_UNITS_PER_CENTIGRADES;

-       *value =3D temp;
+           &nbs= p;   *value =3D temp;
+           &nbs= p;   break;
+       case AMDGPU_PP_SENSOR_EDGE_TEMP:<= br> +           &nbs= p;   *value =3D metrics.TemperatureEdge *
+           &nbs= p;           PP_TEMPERATU= RE_UNITS_PER_CENTIGRADES;
+           &nbs= p;   break;
+       case AMDGPU_PP_SENSOR_MEM_TEMP: +           &nbs= p;   *value =3D metrics.TemperatureHBM *
+           &nbs= p;           PP_TEMPERATU= RE_UNITS_PER_CENTIGRADES;
+           &nbs= p;   break;
+       default:
+           &nbs= p;   pr_err("Invalid sensor for retrieving temp\n"); +           &nbs= p;   return -EINVAL;
+       }

        return 0;
 }
@@ -1235,8 +1285,10 @@ static int smu_v11_0_read_sensor(struct smu_cont= ext *smu,
            &nb= sp;   ret =3D smu_get_current_clk_freq(smu, PPCLK_GFXCLK, (uint32= _t *)data);
            &nb= sp;   *size =3D 4;
            &nb= sp;   break;
-       case AMDGPU_PP_SENSOR_GPU_TEMP:
-            &n= bsp;  ret =3D smu_v11_0_thermal_get_temperature(smu, (uint32_t *)data)= ;
+       case AMDGPU_PP_SENSOR_HOTSPOT_TEM= P:
+       case AMDGPU_PP_SENSOR_EDGE_TEMP:<= br> +       case AMDGPU_PP_SENSOR_MEM_TEMP: +           &nbs= p;   ret =3D smu_v11_0_thermal_get_temperature(smu, sensor, (uint= 32_t *)data);
            &nb= sp;   *size =3D 4;
            &nb= sp;   break;
        case AMDGPU_PP_SENSOR_GPU_POWER:=
--
2.21.0

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