Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU

[Aleksandar Markovic <amarkovic@wavecomp.com>]

> From: Fredrik Noring <noring@nocrew.org>
> Sent: Monday, October 15, 2018 7:02 PM
> To: Maciej W. Rozycki
> Cc: Philippe Mathieu-Daudé; Richard Henderson; Aleksandar Markovic; Aurelien Jarno; > qemu-devel@nongnu.org Developers; Jürgen Urban
> Subject: Re: [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU
> 
> Hi Maciej, Philippe,
> 
> >  So results of individual operations are as in the comments with this
> > code:
> >
> >       mthi    $0              # HI <- 0
> >       mtlo    $0              # LO <- 0
> >       addiu   $2, $0, 1       # $2 <- 1
> >       lui     $3, 0x4000      # $3 <- 0x40000000
> >       maddu   $4, $3, $2      # HI <- 0
> >                               # LO <- 0x40000000
> >                               # $4 <- 0x40000000
> >       maddu   $5, $4, $2      # HI <- 0
> >                               # LO <- 0xffffffff80000000
> >                               # $5 <- 0xffffffff80000000
> >       maddu   $6, $4, $2      # HI <- 1
> >                               # LO <- 0
> >                               # $6 <- 0
> 
> Adding tests such as the one above to for example tests/tcg/mips/txx9/
> would be useful, I think.

By no means, yes.

A peculiar case of DMULTU would be interesting.

It would be nice to implement just a single instruction from MMI, let's say PAND, and have a test for it.

Thanks,
Aleksandar

> As previously noted, GCC can produce 32-bit
> R5900 programs but 64-bit compilations fail, so full test coverage may
> not be easily obtainable at the moment.
> 
> Fredrik
>