From: "Sanil, Shruthi" <shruthi.sanil@intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"mgross@linux.intel.com" <mgross@linux.intel.com>,
"Thokala, Srikanth" <srikanth.thokala@intel.com>,
"Raja Subramanian,
Lakshmi Bai" <lakshmi.bai.raja.subramanian@intel.com>,
"Sangannavar,
Mallikarjunappa" <mallikarjunappa.sangannavar@intel.com>
Subject: RE: [PATCH v9 2/2] clocksource: Add Intel Keem Bay timer support
Date: Mon, 7 Mar 2022 16:33:38 +0000 [thread overview]
Message-ID: <BN9PR11MB5545C28013C6FD435154FB1BF1089@BN9PR11MB5545.namprd11.prod.outlook.com> (raw)
In-Reply-To: <YiYMYuENpb1VJV9G@smile.fi.intel.com>
> -----Original Message-----
> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Sent: Monday, March 7, 2022 7:15 PM
> To: Sanil, Shruthi <shruthi.sanil@intel.com>
> Cc: daniel.lezcano@linaro.org; tglx@linutronix.de; robh+dt@kernel.org;
> linux-kernel@vger.kernel.org; devicetree@vger.kernel.org;
> mgross@linux.intel.com; Thokala, Srikanth <srikanth.thokala@intel.com>;
> Raja Subramanian, Lakshmi Bai <lakshmi.bai.raja.subramanian@intel.com>;
> Sangannavar, Mallikarjunappa <mallikarjunappa.sangannavar@intel.com>
> Subject: Re: [PATCH v9 2/2] clocksource: Add Intel Keem Bay timer support
>
> On Mon, Mar 07, 2022 at 05:01:47PM +0530, shruthi.sanil@intel.com wrote:
> > From: Shruthi Sanil <shruthi.sanil@intel.com>
> >
> > The Intel Keem Bay timer driver supports clocksource and clockevent
> > features for the timer IP used in Intel Keem Bay SoC.
> > The timer block supports 1 free running counter and 8 timers.
> > The free running counter can be used as a clocksource and the timers
> > can be used as clockevent. Each timer is capable of generating
> > individual interrupt.
> > Both the features are enabled through the timer general config register.
>
> ...
>
> > + pr_err("%pOF: FW_BUG: Prescaler is not enabled\n", np);
>
> FW_BUG is a macro. The above is an incorrect use of it.
Oh! I'll correct it and send the updated patch.
>
> ...
>
> > + pr_err("%pOF: FW_BUG: free running counter is not
> enabled\n", np);
>
> Ditto.
>
> --
> With Best Regards,
> Andy Shevchenko
>
next prev parent reply other threads:[~2022-03-07 16:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 11:31 [PATCH v9 0/2] Add the driver for Intel Keem Bay SoC timer block shruthi.sanil
2022-03-07 11:31 ` [PATCH v9 1/2] dt-bindings: timer: Add bindings for Intel Keem Bay SoC Timer shruthi.sanil
2022-03-07 11:31 ` [PATCH v9 2/2] clocksource: Add Intel Keem Bay timer support shruthi.sanil
2022-03-07 13:45 ` Andy Shevchenko
2022-03-07 16:33 ` Sanil, Shruthi [this message]
2022-03-07 17:21 ` Daniel Lezcano
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