RE: [EXT] Re: [PATCH v2 3/3] ARM: orion5x: Add D-Link DNS-323 based on Device Tree

[Elad Nachman <enachman@marvell.com>]

Hi Pali,

I do not have documentation for this controller, as it is almost 20 years old...

I did manage, however, to find some very old u-boot code for it.

From reverse engineering this u-boot code, it looks like this is a "DEV" MPP function register, similar to the MPP0_7, MPP8_15 and the MPP16_23 registers.

Basically, setting bits of this registers assign the pin to the special purpose, while clearing it makes it a GPP (General Purpose Pin).

For all of the boards (over half a dozen) support by this u-boot, this register is set to zero (see above).
From user guides I have found for few of these boards, only MPPs up to MPP19 are used, hence it make sense to leave these MPPs as GPPs .

Hopefully this helps in some way.

FYI,

Elad.


-----Original Message-----
From: Pali Rohár <pali@kernel.org> 
Sent: Monday, September 26, 2022 3:23 PM
To: Elad Nachman <enachman@marvell.com>
Cc: maukka@ext.kapsi.fi; Andrew Lunn <andrew@lunn.ch>; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; arnd@arndb.de; olof@lixom.net; sebastian.hesselbarth@gmail.com; gregory.clement@bootlin.com; linux@armlinux.org.uk; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: [EXT] Re: [PATCH v2 3/3] ARM: orion5x: Add D-Link DNS-323 based on Device Tree

External Email

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Hello Elad! I hope that would not bothering you. We are doing here cleanup of kernel code for older Marvell SoCs (Orion) and there one unknown thing about 88F5181's 0x10008 register. See below.

On Monday 26 September 2022 14:56:48 maukka@ext.kapsi.fi wrote:
> On 23.9.2022 21:02, Pali Rohár wrote:
> > On Friday 23 September 2022 14:12:24 Andrew Lunn wrote:
> > > > > > +	if (of_machine_is_compatible("dlink,dns323a1")) {
> > > > > > +		writel(0, MPP_DEV_CTRL);		/* DEV_D[31:16] */
> > > > >
> > > > > I spotted this in dns323-setup.c as well. Do you have any idea 
> > > > > what it does?
> > > > >
> > > >
> > > > No idea. I have tried to replicate what was in dns323-setup.c as 
> > > > exactly as possible.
> > > > I can try to leave it out and see if anything changes.
> > > 
> > > It is best to keep what we don't understand. It will be there for 
> > > a reason.
> > > 
> > > 	Andrew
> > 
> > Hello! I tried to index all publicly available Marvell SoC 
> > documentations into kernel documentation subfolder:
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__docs.kernel.org
> > _arm_marvell.html&d=DwIDaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=eTeNTLEK5-TxXc
> > zjOcKPhANIFtlB9pP4lq9qhdlFrwQ&m=QnvtICgYrknBcrJ4SBYkL8zUxNtqo3A40bjE
> > TmCHhBbdWQOUaRffkiMgtuRkQ2WE&s=QiNvxcOSpDNOTgiK8nuCZ18pgJRKBtgVu-SeG
> > E9n7CY&e=
> > 
> > For Orion there is linked Datasheet and User Manual, so you could 
> > try to find in those documents that mentioned register and check 
> > what it is doing.
> 
> MPP_DEV_CTRL refers to register at address 0x10008. According to the 
> 88F5152 user manual it's 'Device Multiplex Control Register' Offset: 
> 0x10008.
> 
> Bits    Field     Type/InitVal     Description
> [31:0]  Reserved  RES 0x03FF0000   Reserved. NOTE: Must be 0x03FF0000'.
> 
> DEV_D[31:16] receives no hits in the documentation, only to 
> DEV_D[15:0] are referred.

In linked public document I found same thing. Register is for 88F5182 reserved. (You have typo in comment, it is 88F5182, not *52).

> Maybe 88F5151 is different, hard to say.

I have feeling that for 88F5181 it is not reserved and has to be configured correctly. (Also typo in your comment, it is 88F5181, not *51).
But I have not found any copy of 88F5181 user manual document on internet.

In past 88F518x and 88F528x documents and user manuals were available publicly on Marvell website, visible from web archive:
https://urldefense.proofpoint.com/v2/url?u=https-3A__web.archive.org_web_20080607215437_http-3A__www.marvell.com_products_media_index.jsp&d=DwIDaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=eTeNTLEK5-TxXczjOcKPhANIFtlB9pP4lq9qhdlFrwQ&m=QnvtICgYrknBcrJ4SBYkL8zUxNtqo3A40bjETmCHhBbdWQOUaRffkiMgtuRkQ2WE&s=k1vn2-NVEU2OsJYVTmuWMRKdN2t1MQ9pduTkGaasU4s&e=  

But Marvell deleted these documents from their public website and for kernel developers they are now probably lost. I do not know about any other backups.


Elad, could you please help us? Do you have access to functional specifications / user manuals for 88F518x and 88F528x or have information how kernel developers can get access to those documents?
Hopefully they were not totally lost. We just need explanation for register 'Device Multiplex Control Register' Offset: 0x10008.