From: Tan, Ley Foon <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [GIT PULL] SoCFPGA changes for v2021.01-rc1
Date: Mon, 12 Oct 2020 10:12:12 +0000 [thread overview]
Message-ID: <BY5PR11MB38933FF28721081EF06D2818CC070@BY5PR11MB3893.namprd11.prod.outlook.com> (raw)
Hi Tom
Please pull the SoCFPGA changes for 2021.01.
Travis CI build: https://travis-ci.org/github/lftan/u-boot/builds/734245377
Thanks.
Regards
Ley Foon
The following changes since commit a58d86db46456c4e14d4d140e419c4c5999fb2f8:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-cfi-flash (2020-10-08 10:20:53 -0400)
are available in the Git repository at:
https://github.com/lftan/u-boot.git for-next
for you to fetch changes up to 505dc1c6795ba0b80abf344bb6464cdc20774f44:
Makefile: socfpga: Generate sfp file with 4 SPL images (2020-10-09 17:53:17 +0800)
----------------------------------------------------------------
Chee Hong Ang (19):
clk: agilex: Handle clock configuration differently in SPL and U-Boot proper
clk: agilex: Additional membus writes for HPS PLL
arm: socfpga: soc64: Remove PHY interface setup from misc arch init
arm: socfpga: soc64: Initialize timer in SPL only
sysreset: socfpga: soc64: Rename SYSRESET SoCFPGA driver for S10 to SoC64
sysreset: socfpga: agilex: Enable sysreset support
arm: socfpga: soc64: Add SDM triggered warm reset bit mask
arm: socfpga: soc64: Show reset state in SPL
arm: socfpga: Use DM watchdog timer
fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox
fpga: intel_sdm_mb: Add watchdog reset
arm: socfpga: agilex: Enable FPGA Full Reconfiguration support
arm: socfpga: soc64: Add timeout waiting for NOC idle ACK
arm: socfpga: mailbox: Refactor mailbox timeout event handling
arm: socfpga: mailbox: Always read mailbox responses before returning status
arm: socfpga: mailbox: Support sending large mailbox command
arm: socfpga: soc64: Disable CONFIG_PSCI_RESET
arm: socfpga: soc64: Remove CONFIG_OF_EMBED
Makefile: socfpga: Generate sfp file with 4 SPL images
Chin Liang See (2):
configs: socfpga: soc64: Avoid SPL enter infinite loop during exception
arm: socfpga: soc64: Document down boot_scratch_cold register usage
Dalon Westergreen (2):
arm: socfpga: arria10: Add qts-filter for Arria10 socfpga
arm: socfpga: arria10: Add handoff header for A10 SoCDK SDMMC
Ley Foon Tan (7):
clk: agilex: Add NAND clock support
clk: agilex: Add clock enable support
arm: socfpga: mailbox: Update mailbox response codes
arm: socfpga: mailbox: Add mailbox retry support
arm: dts: socfpga: arria10: Move to use generic handoff dtsi
tools: socfpgaimage: Add check params function for Arria 10 (v1)
tools: socfpgaimage: Add param entry point (ep) support for Arria 10 (v1)
Makefile | 27 +-
arch/arm/Kconfig | 2 +-
arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 +
arch/arm/dts/socfpga_arria10-handoff.dtsi | 290 ++++++++++++++++++
arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi | 4 +
.../dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi | 3 +-
.../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 329 ---------------------
arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h | 305 +++++++++++++++++++
arch/arm/dts/socfpga_stratix10.dtsi | 1 -
arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 1 +
arch/arm/mach-socfpga/Kconfig | 3 +-
arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 38 ++-
.../include/mach/reset_manager_soc64.h | 12 +-
.../include/mach/system_manager_soc64.h | 8 +
arch/arm/mach-socfpga/mailbox_s10.c | 172 +++++++----
arch/arm/mach-socfpga/misc_s10.c | 87 +-----
arch/arm/mach-socfpga/qts-filter-a10.sh | 141 +++++++++
arch/arm/mach-socfpga/reset_manager_s10.c | 47 ++-
arch/arm/mach-socfpga/spl_agilex.c | 3 +-
arch/arm/mach-socfpga/spl_s10.c | 3 +-
arch/arm/mach-socfpga/timer_s10.c | 3 +-
configs/socfpga_agilex_defconfig | 5 +-
configs/socfpga_stratix10_defconfig | 3 +-
doc/README.socfpga | 37 ++-
drivers/clk/altera/clk-agilex.c | 113 ++++++-
drivers/fpga/Kconfig | 14 +-
drivers/fpga/Makefile | 2 +-
drivers/fpga/altera.c | 7 +-
drivers/fpga/{stratix10.c => intel_sdm_mb.c} | 5 +-
drivers/sysreset/Kconfig | 8 +-
drivers/sysreset/Makefile | 2 +-
...eset_socfpga_s10.c => sysreset_socfpga_soc64.c} | 0
include/altera.h | 9 +-
tools/socfpgaimage.c | 50 +++-
34 files changed, 1190 insertions(+), 548 deletions(-)
create mode 100644 arch/arm/dts/socfpga_arria10-handoff.dtsi
delete mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h
create mode 100755 arch/arm/mach-socfpga/qts-filter-a10.sh
rename drivers/fpga/{stratix10.c => intel_sdm_mb.c} (97%)
rename drivers/sysreset/{sysreset_socfpga_s10.c => sysreset_socfpga_soc64.c} (100%)
next reply other threads:[~2020-10-12 10:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 10:12 Tan, Ley Foon [this message]
2020-10-12 14:59 ` [GIT PULL] SoCFPGA changes for v2021.01-rc1 Tom Rini
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