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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" [AMD Official Use Only - Internal Distribution Only] Ping ..... >-----Original Message----- >From: Emily.Deng >Sent: Friday, September 18, 2020 11:27 AM >To: amd-gfx@lists.freedesktop.org >Cc: Deng, Emily >Subject: [PATCH 1/2] drm/amdgpu/sriov: Add one parameter for mcbp debug > >For debug convenient, add sriov_mcbp parameter. > >Signed-off-by: Emily.Deng >Change-Id: I84019eb4344e00d85b2ecc853145aabb312412fe >--- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + > drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 +++++++++ >drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 ++- >drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +- > 4 files changed, 13 insertions(+), 2 deletions(-) > >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >index 13f92dea182a..a255fbf4d370 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h >@@ -183,6 +183,7 @@ extern uint amdgpu_ras_mask; extern int >amdgpu_bad_page_threshold; extern int amdgpu_async_gfx_ring; extern int >amdgpu_mcbp; >+extern int amdgpu_sriov_mcbp; > extern int amdgpu_discovery; > extern int amdgpu_mes; > extern int amdgpu_noretry; >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >index 3f07d1475bd2..b0b2f0f7be94 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c >@@ -145,6 +145,7 @@ uint amdgpu_dc_feature_mask = 0; uint >amdgpu_dc_debug_mask = 0; int amdgpu_async_gfx_ring = 1; int >amdgpu_mcbp = 0; >+int amdgpu_sriov_mcbp = 1; > int amdgpu_discovery = -1; > int amdgpu_mes = 0; > int amdgpu_noretry; >@@ -578,6 +579,14 @@ MODULE_PARM_DESC(mcbp, > "Enable Mid-command buffer preemption (0 = disabled (default), 1 = >enabled)"); module_param_named(mcbp, amdgpu_mcbp, int, 0444); > >+/** >+ * DOC: sriov_mcbp (int) >+ * It is used to enable mid command buffer preemption. (0 = disabled, 1 >+= enabled(default)) */ MODULE_PARM_DESC(sriov_mcbp, >+"Enable sriov Mid-command buffer preemption (0 = disabled (default), >1 >+= enabled)"); module_param_named(sriov_mcbp, amdgpu_sriov_mcbp, int, >+0444); >+ > /** > * DOC: discovery (int) > * Allow driver to discover hardware IP information from IP Discovery table at >the top of VRAM. >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c >index 2f53fa0ae9a6..ca0e17688bdf 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c >@@ -236,7 +236,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, >unsigned num_ibs, > > for (i = 0; i < num_ibs; ++i) { > ib = &ibs[i]; >- >+if (!amdgpu_sriov_mcbp) >+ib->flags &= ~AMDGPU_IB_FLAG_PREEMPT; > /* drop preamble IBs if we don't have a context switch */ > if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && > skip_preamble && >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >index d7f37cb92a97..156e76a5a6e0 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >@@ -742,7 +742,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, >void *data, struct drm_file > dev_info.ids_flags = 0; > if (adev->flags & AMD_IS_APU) > dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION; >-if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) >+if (amdgpu_mcbp || (amdgpu_sriov_vf(adev) && >amdgpu_sriov_mcbp)) > dev_info.ids_flags |= >AMDGPU_IDS_FLAGS_PREEMPTION; > if (amdgpu_is_tmz(adev)) > dev_info.ids_flags |= AMDGPU_IDS_FLAGS_TMZ; >-- >2.25.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx