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From: "Victor Kamensky" <kamensky@cisco.com>
To: Paul Barker <pbarker@konsulko.com>
Cc: openembedded-core <openembedded-core@lists.openembedded.org>,
	"Richard Purdie" <richard.purdie@linuxfoundation.org>,
	Khem Raj <raj.khem@gmail.com>
Subject: Re: [OE-core] [PATCH 1/2] qemu: add 34Kf-64tlb fictitious cpu type
Date: Wed, 7 Oct 2020 21:52:58 +0000	[thread overview]
Message-ID: <BYAPR11MB3047DE4238846255A324C998CD0A0@BYAPR11MB3047.namprd11.prod.outlook.com> (raw)
In-Reply-To: <CAM9ZRVst-JLA3aOa+U2Sd1Cqj8ARsAyVhCu0Yhhk5we+FKsmdQ@mail.gmail.com>

Hi Paul,

Please forgive my horrible email agent that I have at work.
Please look for 'kamensky>' for responses inline.

________________________________________
From: Paul Barker <pbarker@konsulko.com>
Sent: Wednesday, October 7, 2020 1:46 PM
To: Victor Kamensky (kamensky)
Cc: openembedded-core; Richard Purdie; Khem Raj
Subject: Re: [OE-core] [PATCH 1/2] qemu: add 34Kf-64tlb fictitious cpu type

On Wed, 7 Oct 2020 at 21:39, Victor Kamensky via
lists.openembedded.org <kamensky=cisco.com@lists.openembedded.org>
wrote:
>
> In Yocto Project PR 13992 it was reported that qemumips
> in autobuilder runs almost twice slower then qemumips64 and
> some times hit time out.
>
> Upon investigations of qemu-system with perf, gdb, and
> SystemTap and comparing qemumips and qemumips64 machines
> behavior it was noticed that qemu soft mmu code behaves
> quite different and in case if qemumips tlbwr instruction
> called 16 times more oftern. It happens that in qemumips64
> case qemu runs with cpu type that contains 64 TLB, but in case
> of qemumips qemu runs with cpu type that contains only
> 16 TLBs.
>
> The idea of proposed qemu patch is to introduce fictitious
> 34Kf-64tlb cpu type that defined exactly as 34Kf but has
> 64 TLBs, instead of original 16 TLBs.
>
> Testing of core-image-full-cmdline:do_testimage with
> 34Kf-64tlb shows 40% or so test execution real time
> improvement.
>
> Note for future porters of the patch: easiest way to update
> the patch and be in sync with 34Kf definition is to copy
> 34Kf machine definition and apply the following changes to
> it (just change 15 to 63 of CP0C1_MMU bits value)
>
> [kamensky@coreos-lnx2 qemu]$ diff ~/34Kf.c ~/34Kf-64tlb.c
> 2c2
> <         .name = "34Kf",
> >         .name = "34Kf-64tlb",
> 6c6
> <         .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
> >         .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) |
>
> Fixes https://bugzilla.yoctoproject.org/show_bug.cgi?id=13992

Forgive my ignorance as to the range of MIPS processors available but
does any real MIPS CPU have 64 TLBs?

kamensky> I am not up to date wrt 32 bit only MIPS CPUs out there.
kamensky> I've experience with MIPS64 real CPUs that could
kamensky> operate both in 64 bit and 32 bit mode. In fact in our
kamensky> case even in time when we used 32bit user-land kernel
kamensky> itself was running 64 bit kernel (as OE MIPS multi-lib test
kamensky> case). In 32bit case h/w memory map quite unfriendly
kamensky> to linux kernel, kernel can see directly only 512Mb of
kamensky> unmapped phy memory KSEG0/KSEG1, and bigger amount would
kamensky> require CONFIG_HIGHMEM that drag additional mappings
kamensky> for kernel access of the memory.

kamensky> MIPS32 spec itself does allow 64 TLBs, for sure. 

If such a CPU model exists
shouldn't we be using this instead of inventing a new model?

kamensky> Note about other available MIPS 32bit existing CPU
kamensky> model with bigger number of TLBs below.

I'm a bit worried that targeting a unique, fictitious CPU model will
lead to us wasting time debugging obscure failures that other projects
have never seen and that would never occur on real hardware.

kamensky> I do share your concern up to some extent. But I think
kamensky> the risk is minimal.

kamensky> Please note in qemumips64 machine case we already
kamensky> use fictitious CPU type as "MIPS64R2-generic". AFAIK
kamensky> there is no such real CPU out there, it is generic thing
kamensky> inside of qemu. For sure, there is
kamensky> no such real combination as "MIPS64R2-generic" cpu type
kamensky> and machine "malta". So up to some extent a lot things
kamensky> under qemu are fictitious. 

kamensky> I've looked at other MIPS only CPUs that qemu supports.
kamensky> There is definition of "mips32r6-generic". Another fictitious
kamensky> CPU type but defined in qemu already. That one configured
kamensky> with 32 TLBs, but when I've tried it with qemumips it flat out
kamensky> did not boot. Which brings us to other practical issue: proper
kamensky> match between qemu cpu type and our qemumips kernel
kamensky> configuration, question about qemu CPU emulation correctness
kamensky> and whether it is bug free, etc, etc ..

kamensky> By modifying 34Kf cpu type that worked for us before, and doing
kamensky> minimal low risk changes in one limited small aspect of the
kamensky> system, that brings us performance gains, IMO is worth doing.

Thanks,
Victor

--
Paul Barker
Konsulko Group

  reply	other threads:[~2020-10-07 21:53 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-07 20:38 [PATCH 0/2] qemumips: speeding up Victor Kamensky
2020-10-07 20:38 ` [PATCH 1/2] qemu: add 34Kf-64tlb fictitious cpu type Victor Kamensky
2020-10-07 20:46   ` [OE-core] " Paul Barker
2020-10-07 21:52     ` Victor Kamensky [this message]
2020-10-07 22:11       ` Khem Raj
2020-10-07 22:04     ` Richard Purdie
2020-10-07 22:15     ` Khem Raj
2020-10-07 22:24       ` Paul Barker
2020-10-07 22:05   ` Khem Raj
2020-10-08  5:05     ` Victor Kamensky
2020-10-08  5:55       ` Khem Raj
2020-10-08  7:29   ` [OE-core] " Ross Burton
2020-10-08 11:53     ` Alexander Kanavin
2020-10-08 16:05       ` Khem Raj
2020-10-08 16:39         ` Victor Kamensky
2020-10-07 20:38 ` [PATCH 2/2] qemumips: use 34Kf-64tlb CPU emulation Victor Kamensky

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