Hi Christian,
You can reproduce this issue by allocate CSA buffer in baremetal and map them to reserved VM address.
Please see the attached patch.
Best Regards
Rex
No, if the vm size is small, there may only on root pd entry.
we need to make sure the mask >= 0;
Maybe this change revert Christian's commit:
commit 72af632549b97ead9251bb155f08fefd1fb6f5c3
Author: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
Date: Sat Sep 15 10:02:13 2018 +0200
drm/amdgpu: add amdgpu_vm_entries_mask v2
We can't get the mask for the root directory from the number of entries.
So add a new function to avoid that problem.
Best Regards
Rex
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Zhang, Jerry(Junwei) <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
Sent: Tuesday, October 23, 2018 1:12 PM
To: Zhu, Rex; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; Deucher, Alexander; Koenig, Christian
Subject: Re: [PATCH] drm/amdgpu: Fix amdgpu_vm_alloc_pts failedOn 10/23/2018 11:29 AM, Rex Zhu wrote:
> when the VA address located in the last PD entries,
> the alloc_pts will faile.
>
> Use the right PD mask instand of hardcode, suggested
> by jerry.zhang.
>
> Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Thanks to verify that.
Feel free to add
Reviewed-by: Junwei Zhang <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
Also like to get to know some background about these two functions from
Christian.
Perhaps we may make it more simple, e.g. merging them together.
Regards,
Jerry
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 054633b..3939013 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -202,8 +202,11 @@ static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev,
> static uint32_t amdgpu_vm_entries_mask(struct amdgpu_device *adev,
> unsigned int level)
> {
> + unsigned shift = amdgpu_vm_level_shift(adev,
> + adev->vm_manager.root_level);
> +
> if (level <= adev->vm_manager.root_level)
> - return 0xffffffff;
> + return (round_up(adev->vm_manager.max_pfn, 1 << shift) >> shift) - 1;
> else if (level != AMDGPU_VM_PTB)
> return 0x1ff;
> else
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