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From: "Zhu, Rex" <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
To: "Zhang, Jerry" <Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>,
	"amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>,
	"Koenig,
	Christian" <Christian.Koenig-5C7GfCeVMHo@public.gmane.org>
Subject: Re: [PATCH] drm/amdgpu: Fix amdgpu_vm_alloc_pts failed
Date: Tue, 23 Oct 2018 03:31:13 +0000	[thread overview]
Message-ID: <BYAPR12MB27753552FB75C04C871BEA68FBF50@BYAPR12MB2775.namprd12.prod.outlook.com> (raw)
In-Reply-To: <7eb4b4ef-c72a-9a58-2c99-0bfbe6109f69-5C7GfCeVMHo@public.gmane.org>


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Thanks Jerry.

Good suggestion.

Use the right mask for PD instand of hardcode.

so don't need to revert the whole patch.


Best Regards

Rex


________________________________
From: Zhang, Jerry
Sent: Tuesday, October 23, 2018 10:02 AM
To: Zhu, Rex; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; Koenig, Christian
Subject: Re: [PATCH] drm/amdgpu: Fix amdgpu_vm_alloc_pts failed

On 10/23/2018 12:09 AM, Rex Zhu wrote:
> When the va address located in the last pd entry,

Do you mean the root PD?
maybe we need roundup root PD in amdgpu_vm_entries_mask() like
amdgpu_vm_num_entries().

BTW, looks amdgpu_vm_entries_mask() is going to replace the
amdgpu_vm_num_entries()

Jerry
> the alloc_pts will failed.
> caused by
> "drm/amdgpu: add amdgpu_vm_entries_mask v2"
> commit 72af632549b97ead9251bb155f08fefd1fb6f5c3.
>
> Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34 +++++++---------------------------
>   1 file changed, 7 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 054633b..1a3af72 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -191,26 +191,6 @@ static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev,
>   }
>
>   /**
> - * amdgpu_vm_entries_mask - the mask to get the entry number of a PD/PT
> - *
> - * @adev: amdgpu_device pointer
> - * @level: VMPT level
> - *
> - * Returns:
> - * The mask to extract the entry number of a PD/PT from an address.
> - */
> -static uint32_t amdgpu_vm_entries_mask(struct amdgpu_device *adev,
> -                                    unsigned int level)
> -{
> -     if (level <= adev->vm_manager.root_level)
> -             return 0xffffffff;
> -     else if (level != AMDGPU_VM_PTB)
> -             return 0x1ff;
> -     else
> -             return AMDGPU_VM_PTE_COUNT(adev) - 1;
> -}
> -
> -/**
>    * amdgpu_vm_bo_size - returns the size of the BOs in bytes
>    *
>    * @adev: amdgpu_device pointer
> @@ -419,17 +399,17 @@ static void amdgpu_vm_pt_start(struct amdgpu_device *adev,
>   static bool amdgpu_vm_pt_descendant(struct amdgpu_device *adev,
>                                    struct amdgpu_vm_pt_cursor *cursor)
>   {
> -     unsigned mask, shift, idx;
> +     unsigned num_entries, shift, idx;
>
>        if (!cursor->entry->entries)
>                return false;
>
>        BUG_ON(!cursor->entry->base.bo);
> -     mask = amdgpu_vm_entries_mask(adev, cursor->level);
> +     num_entries = amdgpu_vm_num_entries(adev, cursor->level);
>        shift = amdgpu_vm_level_shift(adev, cursor->level);
>
>        ++cursor->level;
> -     idx = (cursor->pfn >> shift) & mask;
> +     idx = (cursor->pfn >> shift) % num_entries;
>        cursor->parent = cursor->entry;
>        cursor->entry = &cursor->entry->entries[idx];
>        return true;
> @@ -1618,7 +1598,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
>        amdgpu_vm_pt_start(adev, params->vm, start, &cursor);
>        while (cursor.pfn < end) {
>                struct amdgpu_bo *pt = cursor.entry->base.bo;
> -             unsigned shift, parent_shift, mask;
> +             unsigned shift, parent_shift, num_entries;
>                uint64_t incr, entry_end, pe_start;
>
>                if (!pt)
> @@ -1673,9 +1653,9 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
>
>                /* Looks good so far, calculate parameters for the update */
>                incr = AMDGPU_GPU_PAGE_SIZE << shift;
> -             mask = amdgpu_vm_entries_mask(adev, cursor.level);
> -             pe_start = ((cursor.pfn >> shift) & mask) * 8;
> -             entry_end = (mask + 1) << shift;
> +             num_entries = amdgpu_vm_num_entries(adev, cursor.level);
> +             pe_start = ((cursor.pfn >> shift) & (num_entries - 1)) * 8;
> +             entry_end = num_entries << shift;
>                entry_end += cursor.pfn & ~(entry_end - 1);
>                entry_end = min(entry_end, end);
>


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  parent reply	other threads:[~2018-10-23  3:31 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-22 16:09 [PATCH] drm/amdgpu: Fix amdgpu_vm_alloc_pts failed Rex Zhu
     [not found] ` <1540224561-4728-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-10-22 17:42   ` Deucher, Alexander
2018-10-23  2:02   ` Zhang, Jerry(Junwei)
     [not found]     ` <7eb4b4ef-c72a-9a58-2c99-0bfbe6109f69-5C7GfCeVMHo@public.gmane.org>
2018-10-23  3:31       ` Zhu, Rex [this message]
2018-10-23  3:29 Rex Zhu
     [not found] ` <1540265370-23923-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-10-23  5:12   ` Zhang, Jerry(Junwei)
     [not found]     ` <7b50f2a1-791e-8eab-6777-e7fff572565c-5C7GfCeVMHo@public.gmane.org>
2018-10-23  5:29       ` Zhang, Jerry(Junwei)
2018-10-23  5:42       ` Zhu, Rex
     [not found]         ` <BYAPR12MB2775C0F7BCA52B2969C9D16EFBF50-ZGDeBxoHBPmJeBUhB162ZQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-10-23  9:01           ` Christian König
     [not found]             ` <62aee584-d4b1-dd9b-234e-8ca7d7a23a29-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-23  9:08               ` Zhu, Rex

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