All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.
@ 2021-07-28  6:10 Yifan Zhang
  2021-07-28 13:45 ` Alex Deucher
  0 siblings, 1 reply; 5+ messages in thread
From: Yifan Zhang @ 2021-07-28  6:10 UTC (permalink / raw)
  To: amd-gfx; +Cc: Yifan Zhang

If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 03acc777adf7..70b64b510743 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3675,7 +3675,15 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
 	if (ring->use_doorbell) {
 		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
 					(adev->doorbell_index.kiq * 2) << 2);
-		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
+		/* In renoir, if GC has entered CGPG, ringing doorbell > first page
+		 * doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to
+		 * workaround this issue.
+		 */
+		if (adev->asic_type == CHIP_RENOIR)
+			WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
+					(adev->doorbell.size - 4));
+		else
+			WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
 					(adev->doorbell_index.userqueue_end * 2) << 2);
 	}
 
-- 
2.25.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.
  2021-07-28  6:10 [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir Yifan Zhang
@ 2021-07-28 13:45 ` Alex Deucher
  2021-07-29  1:33   ` Zhang, Yifan
  0 siblings, 1 reply; 5+ messages in thread
From: Alex Deucher @ 2021-07-28 13:45 UTC (permalink / raw)
  To: Yifan Zhang; +Cc: amd-gfx list

On Wed, Jul 28, 2021 at 2:10 AM Yifan Zhang <yifan1.zhang@amd.com> wrote:
>
> If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
> Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.
>
> Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>

I assume this won't break gfxoff?  The last time we changed this, it
broke a bunch of scenarios.  Won't this cause just about all doorbells
to wake gfx?

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 03acc777adf7..70b64b510743 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3675,7 +3675,15 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
>         if (ring->use_doorbell) {
>                 WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
>                                         (adev->doorbell_index.kiq * 2) << 2);
> -               WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> +               /* In renoir, if GC has entered CGPG, ringing doorbell > first page
> +                * doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to
> +                * workaround this issue.
> +                */
> +               if (adev->asic_type == CHIP_RENOIR)
> +                       WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> +                                       (adev->doorbell.size - 4));
> +               else
> +                       WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
>                                         (adev->doorbell_index.userqueue_end * 2) << 2);
>         }
>
> --
> 2.25.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* RE: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.
  2021-07-28 13:45 ` Alex Deucher
@ 2021-07-29  1:33   ` Zhang, Yifan
  2021-07-29  2:24     ` Alex Deucher
  0 siblings, 1 reply; 5+ messages in thread
From: Zhang, Yifan @ 2021-07-29  1:33 UTC (permalink / raw)
  To: Alex Deucher; +Cc: amd-gfx list

Hi Alex,

No, it won't break gfxoff. The "gfxoff broken" issue we saw last time has been fixed on CP firmware update for Renoir, and this patch changes doorbell range setting specifically for Renoir, not covering the other ASICs. I think it is better to change doorbell range setting per ASIC to mitigate possible side effects.

BRs,
Yifan

-----Original Message-----
From: Alex Deucher <alexdeucher@gmail.com> 
Sent: Wednesday, July 28, 2021 9:46 PM
To: Zhang, Yifan <Yifan1.Zhang@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.

On Wed, Jul 28, 2021 at 2:10 AM Yifan Zhang <yifan1.zhang@amd.com> wrote:
>
> If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
> Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.
>
> Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>

I assume this won't break gfxoff?  The last time we changed this, it broke a bunch of scenarios.  Won't this cause just about all doorbells to wake gfx?

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 03acc777adf7..70b64b510743 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3675,7 +3675,15 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
>         if (ring->use_doorbell) {
>                 WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
>                                         (adev->doorbell_index.kiq * 2) << 2);
> -               WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> +               /* In renoir, if GC has entered CGPG, ringing doorbell > first page
> +                * doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to
> +                * workaround this issue.
> +                */
> +               if (adev->asic_type == CHIP_RENOIR)
> +                       WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> +                                       (adev->doorbell.size - 4));
> +               else
> +                       WREG32_SOC15(GC, 0, 
> + mmCP_MEC_DOORBELL_RANGE_UPPER,
>                                         (adev->doorbell_index.userqueue_end * 2) << 2);
>         }
>
> --
> 2.25.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7Cyi
> fan1.zhang%40amd.com%7C4a2605541c22483b4a3a08d951ce097c%7C3dd8961fe488
> 4e608e11a82d994e183d%7C0%7C0%7C637630767650055129%7CUnknown%7CTWFpbGZs
> b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> %7C1000&amp;sdata=1TIsNslKHeSNNMDR3MHPaIiP%2BSLVrr5cEfAbCmvZlCw%3D&amp
> ;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.
  2021-07-29  1:33   ` Zhang, Yifan
@ 2021-07-29  2:24     ` Alex Deucher
  2021-07-29  7:57       ` Zhang, Yifan
  0 siblings, 1 reply; 5+ messages in thread
From: Alex Deucher @ 2021-07-29  2:24 UTC (permalink / raw)
  To: Zhang, Yifan; +Cc: amd-gfx list

On Wed, Jul 28, 2021 at 9:33 PM Zhang, Yifan <Yifan1.Zhang@amd.com> wrote:
>
> Hi Alex,
>
> No, it won't break gfxoff. The "gfxoff broken" issue we saw last time has been fixed on CP firmware update for Renoir, and this patch changes doorbell range setting specifically for Renoir, not covering the other ASICs. I think it is better to change doorbell range setting per ASIC to mitigate possible side effects.
>

Thanks.  Do we need a firmware version check to determine when to set
the range differently?

Alex


> BRs,
> Yifan
>
> -----Original Message-----
> From: Alex Deucher <alexdeucher@gmail.com>
> Sent: Wednesday, July 28, 2021 9:46 PM
> To: Zhang, Yifan <Yifan1.Zhang@amd.com>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
> Subject: Re: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.
>
> On Wed, Jul 28, 2021 at 2:10 AM Yifan Zhang <yifan1.zhang@amd.com> wrote:
> >
> > If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
> > Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.
> >
> > Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
>
> I assume this won't break gfxoff?  The last time we changed this, it broke a bunch of scenarios.  Won't this cause just about all doorbells to wake gfx?
>
> Alex
>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++++-
> >  1 file changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > index 03acc777adf7..70b64b510743 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > @@ -3675,7 +3675,15 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
> >         if (ring->use_doorbell) {
> >                 WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
> >                                         (adev->doorbell_index.kiq * 2) << 2);
> > -               WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> > +               /* In renoir, if GC has entered CGPG, ringing doorbell > first page
> > +                * doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to
> > +                * workaround this issue.
> > +                */
> > +               if (adev->asic_type == CHIP_RENOIR)
> > +                       WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> > +                                       (adev->doorbell.size - 4));
> > +               else
> > +                       WREG32_SOC15(GC, 0,
> > + mmCP_MEC_DOORBELL_RANGE_UPPER,
> >                                         (adev->doorbell_index.userqueue_end * 2) << 2);
> >         }
> >
> > --
> > 2.25.1
> >
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7Cyi
> > fan1.zhang%40amd.com%7C4a2605541c22483b4a3a08d951ce097c%7C3dd8961fe488
> > 4e608e11a82d994e183d%7C0%7C0%7C637630767650055129%7CUnknown%7CTWFpbGZs
> > b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D
> > %7C1000&amp;sdata=1TIsNslKHeSNNMDR3MHPaIiP%2BSLVrr5cEfAbCmvZlCw%3D&amp
> > ;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* RE: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.
  2021-07-29  2:24     ` Alex Deucher
@ 2021-07-29  7:57       ` Zhang, Yifan
  0 siblings, 0 replies; 5+ messages in thread
From: Zhang, Yifan @ 2021-07-29  7:57 UTC (permalink / raw)
  To: Alex Deucher; +Cc: amd-gfx list

Agree. Patch updated. Thanks.

-----Original Message-----
From: Alex Deucher <alexdeucher@gmail.com> 
Sent: Thursday, July 29, 2021 10:24 AM
To: Zhang, Yifan <Yifan1.Zhang@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.

On Wed, Jul 28, 2021 at 9:33 PM Zhang, Yifan <Yifan1.Zhang@amd.com> wrote:
>
> Hi Alex,
>
> No, it won't break gfxoff. The "gfxoff broken" issue we saw last time has been fixed on CP firmware update for Renoir, and this patch changes doorbell range setting specifically for Renoir, not covering the other ASICs. I think it is better to change doorbell range setting per ASIC to mitigate possible side effects.
>

Thanks.  Do we need a firmware version check to determine when to set the range differently?

Alex


> BRs,
> Yifan
>
> -----Original Message-----
> From: Alex Deucher <alexdeucher@gmail.com>
> Sent: Wednesday, July 28, 2021 9:46 PM
> To: Zhang, Yifan <Yifan1.Zhang@amd.com>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
> Subject: Re: [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.
>
> On Wed, Jul 28, 2021 at 2:10 AM Yifan Zhang <yifan1.zhang@amd.com> wrote:
> >
> > If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
> > Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.
> >
> > Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
>
> I assume this won't break gfxoff?  The last time we changed this, it broke a bunch of scenarios.  Won't this cause just about all doorbells to wake gfx?
>
> Alex
>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++++-
> >  1 file changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > index 03acc777adf7..70b64b510743 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> > @@ -3675,7 +3675,15 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
> >         if (ring->use_doorbell) {
> >                 WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
> >                                         (adev->doorbell_index.kiq * 2) << 2);
> > -               WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> > +               /* In renoir, if GC has entered CGPG, ringing doorbell > first page
> > +                * doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to
> > +                * workaround this issue.
> > +                */
> > +               if (adev->asic_type == CHIP_RENOIR)
> > +                       WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> > +                                       (adev->doorbell.size - 4));
> > +               else
> > +                       WREG32_SOC15(GC, 0, 
> > + mmCP_MEC_DOORBELL_RANGE_UPPER,
> >                                         (adev->doorbell_index.userqueue_end * 2) << 2);
> >         }
> >
> > --
> > 2.25.1
> >
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli
> > st 
> > s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7C
> > yi
> > fan1.zhang%40amd.com%7C4a2605541c22483b4a3a08d951ce097c%7C3dd8961fe4
> > 88 
> > 4e608e11a82d994e183d%7C0%7C0%7C637630767650055129%7CUnknown%7CTWFpbG
> > Zs 
> > b3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
> > 3D 
> > %7C1000&amp;sdata=1TIsNslKHeSNNMDR3MHPaIiP%2BSLVrr5cEfAbCmvZlCw%3D&a
> > mp
> > ;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2021-07-29  7:58 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-28  6:10 [PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir Yifan Zhang
2021-07-28 13:45 ` Alex Deucher
2021-07-29  1:33   ` Zhang, Yifan
2021-07-29  2:24     ` Alex Deucher
2021-07-29  7:57       ` Zhang, Yifan

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.