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Sat, 28 Aug 2021 15:58:24 +0000 From: Peter Delevoryas To: =?Windows-1252?Q?C=E9dric_Le_Goater?= CC: "joel@jms.id.au" , "qemu-devel@nongnu.org" , "qemu-arm@nongnu.org" Subject: Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine Thread-Topic: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine Thread-Index: AQHXm4dh466/7b8SHEitTznuegJn+auIlZeAgAByzN0= Date: Sat, 28 Aug 2021 15:58:24 +0000 Message-ID: References: <20210827210417.4022054-1-pdel@fb.com> <20210827210417.4022054-3-pdel@fb.com> <7a53d5e9-52c2-a06b-1385-fd71a96d7486@kaod.org> In-Reply-To: <7a53d5e9-52c2-a06b-1385-fd71a96d7486@kaod.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: kaod.org; dkim=none (message not signed) header.d=none;kaod.org; dmarc=none action=none header.from=fb.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 186f95bd-690e-442d-b6d6-08d96a3caaa6 x-ms-traffictypediagnostic: BYAPR15MB2504: x-microsoft-antispam-prvs: x-fb-source: Internal x-ms-oob-tlc-oobclassifiers: OLM:639; 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envelope-from=prvs=8874121c5c=pdel@fb.com; helo=mx0a-00082601.pphosted.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.743, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --_000_BYAPR15MB3032BA6C3556797AC2A3461CACC99BYAPR15MB3032namp_ Content-Type: text/plain; charset="Windows-1252" Content-Transfer-Encoding: quoted-printable I think I=92m a little confused on this part. What I meant by =93most machi= nes just use UART5=94 was that most DTS=92s use =93stdout-path=3D&uart5=94,= but fuji uses =93stdout-path=3D&uart1=94. I do see that SCU510 includes a = bit related to UART, but it=92s for disabling booting from UART1 and UART5.= I just care about the console aspect, not booting. This is the commit that changed the serial console from UART5 to UART1 in f= uji=92s DTS: https://github.com/facebook/openbmc-uboot/commit/afeddd6e27b5f= 094bbc4805dc8c1c22b3b7fb203 I don=92t know what the platform.S AST_SCU_MFP_CTRL7 changes do (maybe sett= ing some GPIO for UART1?), but as far as I understand, I don=92t think usin= g UART1 should require any extra registers from the datasheet. An alternate design I considered was UART5=3Dserial_hd(0) and UART1=3Dseria= l_hd(1), maybe that would be more appropriate? I don=92t think anybody uses= both UART=92s simultaneously though, so I didn=92t pursue that design. Some link references: Elbert DTS uses =93stdout-path=3D&uart5=94 https://github.com/facebook/open= bmc-uboot/blob/openbmc/helium/v2019.04/arch/arm/dts/aspeed-bmc-facebook-elb= ert.dts#L17 Fuji DTS uses =93stdout-path=3D&uart1=94 https://github.com/facebook/openbm= c-uboot/blob/openbmc/helium/v2019.04/arch/arm/dts/aspeed-bmc-facebook-fuji.= dts#L17 From: C=E9dric Le Goater Date: Saturday, August 28, 2021 at 1:26 AM To: Peter Delevoryas Cc: joel@jms.id.au , qemu-devel@nongnu.org , qemu-arm@nongnu.org Subject: Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine On 8/27/21 11:04 PM, pdel@fb.com wrote: > From: Peter Delevoryas > > This change replaces the UART serial device initialization code with mach= ine > configuration data, making it so that we have a single code path for cons= ole > UART initialization, but allowing different machines to use different > UART's. This is relevant because the Aspeed chips have 2 debug UART's, UA= RT5 > and UART1, and while most machines just use UART5, some use UART1. I think this is controlled by SCU510. If so, we should have a different HW strapping for the new machine and check the configuration at the SoC level, in aspeed_ast2600.c, to change the serial initialization. Thanks, C. > > Signed-off-by: Peter Delevoryas > --- > hw/arm/aspeed.c | 7 +++++++ > hw/arm/aspeed_ast2600.c | 5 ----- > hw/arm/aspeed_soc.c | 5 ----- > include/hw/arm/aspeed.h | 1 + > 4 files changed, 8 insertions(+), 10 deletions(-) > > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > index 9d43e26c51..ff53d12395 100644 > --- a/hw/arm/aspeed.c > +++ b/hw/arm/aspeed.c > @@ -14,6 +14,7 @@ > #include "hw/arm/boot.h" > #include "hw/arm/aspeed.h" > #include "hw/arm/aspeed_soc.h" > +#include "hw/char/serial.h" > #include "hw/i2c/i2c_mux_pca954x.h" > #include "hw/i2c/smbus_eeprom.h" > #include "hw/misc/pca9552.h" > @@ -21,6 +22,7 @@ > #include "hw/misc/led.h" > #include "hw/qdev-properties.h" > #include "sysemu/block-backend.h" > +#include "sysemu/sysemu.h" > #include "hw/loader.h" > #include "qemu/error-report.h" > #include "qemu/units.h" > @@ -352,6 +354,10 @@ static void aspeed_machine_init(MachineState *machin= e) > } > qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort); > > + serial_mm_init(get_system_memory(), sc->memmap[amc->serial_dev], 2, > + sc->get_irq(&bmc->soc, amc->serial_dev), 38400, > + serial_hd(0), DEVICE_LITTLE_ENDIAN); > + > memory_region_add_subregion(get_system_memory(), > sc->memmap[ASPEED_DEV_SDRAM], > &bmc->ram_container); > @@ -804,6 +810,7 @@ static void aspeed_machine_class_init(ObjectClass *oc= , void *data) > mc->no_parallel =3D 1; > mc->default_ram_id =3D "ram"; > amc->macs_mask =3D ASPEED_MAC0_ON; > + amc->serial_dev =3D ASPEED_DEV_UART5; > > aspeed_machine_class_props_init(oc); > } > diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c > index 56e1adb343..a27b0de482 100644 > --- a/hw/arm/aspeed_ast2600.c > +++ b/hw/arm/aspeed_ast2600.c > @@ -322,11 +322,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *= dev, Error **errp) > sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); > } > > - /* UART - attach an 8250 to the IO space as our UART5 */ > - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, > - aspeed_soc_get_irq(s, ASPEED_DEV_UART5), > - 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); > - > /* I2C */ > object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), > &error_abort); > diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c > index c373182299..0c09d1e5b4 100644 > --- a/hw/arm/aspeed_soc.c > +++ b/hw/arm/aspeed_soc.c > @@ -287,11 +287,6 @@ static void aspeed_soc_realize(DeviceState *dev, Err= or **errp) > sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); > } > > - /* UART - attach an 8250 to the IO space as our UART5 */ > - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, > - aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400, > - serial_hd(0), DEVICE_LITTLE_ENDIAN); > - > /* I2C */ > object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), > &error_abort); > diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h > index c9747b15fc..9f5b9f04d6 100644 > --- a/include/hw/arm/aspeed.h > +++ b/include/hw/arm/aspeed.h > @@ -38,6 +38,7 @@ struct AspeedMachineClass { > uint32_t num_cs; > uint32_t macs_mask; > void (*i2c_init)(AspeedMachineState *bmc); > + uint32_t serial_dev; > }; > > > --_000_BYAPR15MB3032BA6C3556797AC2A3461CACC99BYAPR15MB3032namp_ Content-Type: text/html; charset="Windows-1252" Content-Transfer-Encoding: quoted-printable

I think I=92m a little confused on this part. What I= meant by =93most machines just use UART5=94 was that most DTS=92s use =93s= tdout-path=3D&uart5=94, but fuji uses =93stdout-path=3D&uart1=94. I do see that SCU510 includes a bit related to UART, but it=92s for di= sabling booting from UART1 and UART5. I just care about the console aspect,= not booting.

 

This is the commit that changed the serial console f= rom UART5 to UART1 in fuji=92s DTS: https://github.com/facebook/openbmc-uboot/commit/afeddd6e27b5f094bbc4805dc8= c1c22b3b7fb203

 

I don=92t know what the platform.S AST_SCU_MFP_CTRL7= changes do (maybe setting some GPIO for UART1?), but as far as I understan= d, I don=92t think using UART1 should require any extra registers from the = datasheet.

 

An alternate design I considered was UART5=3Dserial_= hd(0) and UART1=3Dserial_hd(1), maybe that would be more appropriate? I don= =92t think anybody uses both UART=92s simultaneously though, so I didn=92t = pursue that design.

 

Some link references:

Elbert DTS uses =93stdout-path=3D&uart5=94 https= ://github.com/facebook/openbmc-uboot/blob/openbmc/helium/v2019.04/arch/arm/= dts/aspeed-bmc-facebook-elbert.dts#L17

Fuji DTS uses =93stdout-path=3D&uart1=94 https:/= /github.com/facebook/openbmc-uboot/blob/openbmc/helium/v2019.04/arch/arm/dt= s/aspeed-bmc-facebook-fuji.dts#L17

 

From: C=E9dric Le Goater = <clg@kaod.org>
Date: Saturday, August 28, 2021 at 1:26 AM
To: Peter Delevoryas <pdel@fb.com>
Cc: joel@jms.id.au <joel@jms.id.au>, qemu-devel@nongnu.org <= ;qemu-devel@nongnu.org>, qemu-arm@nongnu.org <qemu-arm@nongnu.org>=
Subject: Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from mac= hine

On 8/27/21 11:04 PM, = pdel@fb.com wrote:
> From: Peter Delevoryas <pdel@fb.com>
>
> This change replaces the UART serial device initialization code with m= achine
> configuration data, making it so that we have a single code path for c= onsole
> UART initialization, but allowing different machines to use different<= br> > UART's. This is relevant because the Aspeed chips have 2 debug UART's,= UART5
> and UART1, and while most machines just use UART5, some use UART1.

I think this is controlled by SCU510. If so, we should have a different HW =
strapping for the new machine and check the configuration at the SoC level,=
in aspeed_ast2600.c, to change the serial initialization.


Thanks,

C.
 
>
> Signed-off-by: Peter Delevoryas <pdel@fb.com>
> ---
>  hw/arm/aspeed.c         = | 7 +++++++
>  hw/arm/aspeed_ast2600.c | 5 -----
>  hw/arm/aspeed_soc.c     | 5 -----
>  include/hw/arm/aspeed.h | 1 +
>  4 files changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index 9d43e26c51..ff53d12395 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -14,6 +14,7 @@
>  #include "hw/arm/boot.h"
>  #include "hw/arm/aspeed.h"
>  #include "hw/arm/aspeed_soc.h"
> +#include "hw/char/serial.h"
>  #include "hw/i2c/i2c_mux_pca954x.h"
>  #include "hw/i2c/smbus_eeprom.h"
>  #include "hw/misc/pca9552.h"
> @@ -21,6 +22,7 @@
>  #include "hw/misc/led.h"
>  #include "hw/qdev-properties.h"
>  #include "sysemu/block-backend.h"
> +#include "sysemu/sysemu.h"
>  #include "hw/loader.h"
>  #include "qemu/error-report.h"
>  #include "qemu/units.h"
> @@ -352,6 +354,10 @@ static void aspeed_machine_init(MachineState *mac= hine)
>      }
>      qdev_realize(DEVICE(&bmc->soc), N= ULL, &error_abort);
> 
> +    serial_mm_init(get_system_memory(), sc->memmap[= amc->serial_dev], 2,
> +           &nb= sp;       sc->get_irq(&bmc->soc, am= c->serial_dev), 38400,
> +           &nb= sp;       serial_hd(0), DEVICE_LITTLE_ENDIAN)= ;
> +
>      memory_region_add_subregion(get_system_m= emory(),
>            = ;            &n= bsp;         sc->memmap[ASPEED_D= EV_SDRAM],
>            = ;            &n= bsp;         &bmc->ram_conta= iner);
> @@ -804,6 +810,7 @@ static void aspeed_machine_class_init(ObjectClass = *oc, void *data)
>      mc->no_parallel =3D 1;
>      mc->default_ram_id =3D "ram"= ;;
>      amc->macs_mask =3D ASPEED_MAC0_ON; > +    amc->serial_dev =3D ASPEED_DEV_UART5;
> 
>      aspeed_machine_class_props_init(oc);
>  }
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index 56e1adb343..a27b0de482 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -322,11 +322,6 @@ static void aspeed_soc_ast2600_realize(DeviceStat= e *dev, Error **errp)
>          sysbus_connect_i= rq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
>      }
> 
> -    /* UART - attach an 8250 to the IO space as our UA= RT5 */
> -    serial_mm_init(get_system_memory(), sc->memmap[= ASPEED_DEV_UART5], 2,
> -           &nb= sp;       aspeed_soc_get_irq(s, ASPEED_DEV_UA= RT5),
> -           &nb= sp;       38400, serial_hd(0), DEVICE_LITTLE_= ENDIAN);
> -
>      /* I2C */
>      object_property_set_link(OBJECT(&s-&= gt;i2c), "dram", OBJECT(s->dram_mr),
>            = ;            &n= bsp;      &error_abort);
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index c373182299..0c09d1e5b4 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -287,11 +287,6 @@ static void aspeed_soc_realize(DeviceState *dev, = Error **errp)
>          sysbus_connect_i= rq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
>      }
> 
> -    /* UART - attach an 8250 to the IO space as our UA= RT5 */
> -    serial_mm_init(get_system_memory(), sc->memmap[= ASPEED_DEV_UART5], 2,
> -           &nb= sp;       aspeed_soc_get_irq(s, ASPEED_DEV_UA= RT5), 38400,
> -           &nb= sp;       serial_hd(0), DEVICE_LITTLE_ENDIAN)= ;
> -
>      /* I2C */
>      object_property_set_link(OBJECT(&s-&= gt;i2c), "dram", OBJECT(s->dram_mr),
>            = ;            &n= bsp;      &error_abort);
> diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
> index c9747b15fc..9f5b9f04d6 100644
> --- a/include/hw/arm/aspeed.h
> +++ b/include/hw/arm/aspeed.h
> @@ -38,6 +38,7 @@ struct AspeedMachineClass {
>      uint32_t num_cs;
>      uint32_t macs_mask;
>      void (*i2c_init)(AspeedMachineState *bmc= );
> +    uint32_t serial_dev;
>  };
> 
> 
>

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