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charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 13.4 \(3608.80.23.2.2\)) Subject: Re: [PATCH v3 2/8] target/ppc: add byte-reverse br[dwh] instructions From: Lijun Pan In-Reply-To: <199eadcf-9d05-ce25-8b7a-6a0e1a01c1a1@linaro.org> Date: Thu, 25 Jun 2020 16:13:17 -0500 Content-Transfer-Encoding: quoted-printable Message-Id: References: <20200625170018.64265-1-ljp@linux.ibm.com> <20200625170018.64265-3-ljp@linux.ibm.com> <199eadcf-9d05-ce25-8b7a-6a0e1a01c1a1@linaro.org> To: Richard Henderson X-Mailer: Apple Mail (2.3608.80.23.2.2) X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-25_16:2020-06-25, 2020-06-25 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=2 lowpriorityscore=0 mlxlogscore=722 clxscore=1015 impostorscore=0 phishscore=0 spamscore=0 adultscore=0 malwarescore=0 priorityscore=1501 bulkscore=0 cotscore=-2147483648 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2006250124 Received-SPF: none client-ip=148.163.156.1; envelope-from=ljp@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/25 17:13:06 X-ACL-Warn: Detected OS = Linux 3.x [generic] [fuzzy] X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Lijun Pan , qemu-devel@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" > On Jun 25, 2020, at 12:42 PM, Richard Henderson = wrote: >=20 > On 6/25/20 10:00 AM, Lijun Pan wrote: >> +static void gen_brh(DisasContext *ctx) >> +{ >> + TCGv_i64 t0 =3D tcg_temp_new_i64(); >> + TCGv_i64 t1 =3D tcg_temp_new_i64(); >> + TCGv_i64 t2 =3D tcg_temp_new_i64(); >> + >> + tcg_gen_movi_i64(t0, 0x00ff00ff00ff00ffull); >> + tcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8); >> + tcg_gen_and_i64(t2, t1, t0); >> + tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], t0); >> + tcg_gen_shli_i64(t1, t1, 8); >> + tcg_gen_or_i64(cpu_gpr[rA(ctx->opcode)], t1, t2); >> + >> + tcg_temp_free_i64(t0); >> + tcg_temp_free_i64(t1); >> + tcg_temp_free_i64(t2); >> +} >> + >> static opcode_t opcodes[] =3D { >> +#if defined(TARGET_PPC64) >> +GEN_HANDLER_E(brd, 0x1F, 0x1B, 0x05, 0x0000F801, PPC_NONE, = PPC2_ISA310), >> +GEN_HANDLER_E(brw, 0x1F, 0x1B, 0x04, 0x0000F801, PPC_NONE, = PPC2_ISA310), >> +GEN_HANDLER_E(brh, 0x1F, 0x1B, 0x06, 0x0000F801, PPC_NONE, = PPC2_ISA310), >> +#endif >=20 > No. You haven't even tested this -- it doesn't compile. >=20 >> CC ppc-softmmu/target/ppc/translate.o >> /home/rth/qemu/qemu/target/ppc/translate.c: In function = =E2=80=98gen_brd=E2=80=99: >> /home/rth/qemu/qemu/target/ppc/translate.c:6980:32: error: passing = argument 1 of =E2=80=98tcg_gen_bswap64_i64=E2=80=99 from incompatible = pointer type [-Werror=3Dincompatible-pointer-types] >> 6980 | tcg_gen_bswap64_i64(cpu_gpr[rA(ctx->opcode)], = cpu_gpr[rS(ctx->opcode)]); >> | ~~~~~~~^~~~~~~~~~~~~~~~~ >> | | >> | TCGv_i32 {aka struct TCGv_i32_d = *} >> In file included from /home/rth/qemu/qemu/target/ppc/translate.c:26: >> /home/rth/qemu/qemu/include/tcg/tcg-op.h:533:35: note: expected = =E2=80=98TCGv_i64=E2=80=99 {aka =E2=80=98struct TCGv_i64_d *=E2=80=99} = but argument is of type =E2=80=98TCGv_i32=E2=80=99 {aka =E2=80=98struct = TCGv_i32_d *=E2=80=99} >> 533 | void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg); >> | ~~~~~~~~~^~~ >> /home/rth/qemu/qemu/target/ppc/translate.c:6980:58: error: passing = argument 2 of =E2=80=98tcg_gen_bswap64_i64=E2=80=99 from incompatible = pointer type [-Werror=3Dincompatible-pointer-types] >> 6980 | tcg_gen_bswap64_i64(cpu_gpr[rA(ctx->opcode)], = cpu_gpr[rS(ctx->opcode)]); >> | = ~~~~~~~^~~~~~~~~~~~~~~~~ >> | | >> | = TCGv_i32 {aka struct TCGv_i32_d *} >=20 > and so forth. >=20 > I warned you before about this. Why are you still building only a = restricted > set of targets? >=20 I will configure all the target-list, and add "#if = defined(TARGET_PPC64)" for all gen_brd/w/h(). Lijun