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From: "Prusty, Subhransu S" <subhransu.s.prusty@intel.com>
To: "Kumar, Abhay" <abhay.kumar@intel.com>,
	"Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Nujella, Sathyanarayana" <sathyanarayana.nujella@intel.com>
Subject: Re: [PATCH] drm/i915: set minimum CD clock to twice the BCLK.
Date: Fri, 3 Nov 2017 04:13:32 +0000	[thread overview]
Message-ID: <C0BF5F1E52FD614099983827AF095F34665FF879@BGSMSX102.gar.corp.intel.com> (raw)
In-Reply-To: <05af37be-6a27-ff83-81ea-b95f8c92953c@intel.com>

> 
> On 10/30/2017 5:21 PM, Pandiyan, Dhinakaran wrote:
> > On Sun, 2017-10-29 at 03:04 +0000, Kumar, Abhay wrote:
> >> + Subhransu
> >>
> >> -----Original Message-----
> >> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> Kumar, Abhay
> >> Sent: Thursday, October 26, 2017 12:10 PM
> >> To: Jani Nikula <jani.nikula@linux.intel.com>; Dhinakaran Pandiyan
> <dhinakaran.pandiyan@gmail.com>; subransu.s.prusty@intel.com
> >> Cc: intel-gfx@lists.freedesktop.org; Nujella, Sathyanarayana
> <sathyanarayana.nujella@intel.com>
> >> Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the
> BCLK.
> >>
> >>
> >>
> >> On 10/26/2017 1:45 AM, Jani Nikula wrote:
> >>> On Wed, 25 Oct 2017, Dhinakaran Pandiyan
> <dhinakaran.pandiyan@gmail.com> wrote:
> >>>> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@intel.com
> wrote:
> >>>>> From: Abhay Kumar <abhay.kumar@intel.com>
> >>>>>
> >>>>> In glk when device boots with only 1366x768 panel, HDA codec doesn't
> comeup.
> >>>>> This result in no audio forever as cdclk is < 96Mhz.
> >>> Forever... or until next modeset with audio enabled?
> >> Soundcard probing/detection and creation happens only during bootup.  So
> even though we do modeset later there is no soundcard driver to handle the
> event.
> >>>>> This chagne will ensure CD clock to be twice of  BCLK.
> >>>>>
> >>>>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> >>>>> Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
> >>>>> ---
> >>>>>    drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
> >>>>>    1 file changed, 1 insertion(+), 1 deletion(-)
> >>>>>
> >>>>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>> b/drivers/gpu/drm/i915/intel_cdclk.c index
> >>>>> e8884c2ade98..185a70f0921c
> >>>>> 100644
> >>>>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> >>>>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct
> >>>>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock
> >>>>> frequency must be at least twice * the frequency of the Azalia
> >>>>> BCLK." and BCLK is 96 MHz by default. */
> >>>>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> >>>>> +	if (INTEL_GEN(dev_priv) >= 9)
> >>>> Why should cdclk be increased when audio is not being enabled?
> >>> Indeed. I can easily imagine a counter-bug reporting excessive cdclk
> >>> when audio is not enabled.
> >> During bootup time audio driver is trying to acquire HDA audio power well
> inside i915 and then it will send HDA verb commands.
> >> since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.
> This was working fine  before SKL/APL since there was no 2 PPC .
> >>
> >> Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to
> needed CDCLK?
> > I think it is worth exploring, do you have code to test whether it
> > solves this particular issue?
> No i don't have test code for this but what i learned from other OS that
> glk run at 148000 and cnl 96000*2 due to this limitation all the time.
> 
> @Shubhransu : can you please answer this doubt which we all have. This
> we should be able to get from HDA specs.

This clock setting is specific to idisp codec and HDA spec may not have details on this.
Yes we can test the changes with skylake audio driver. I believe Sathya has already
tested with the changes.

Regards,
Subhransu

> 
> >
> >> wondering if this approach can cause any issue to subsequent HDA verb
> commands ..
> >>
> >>
> >>> BR,
> >>> Jani.
> >>>
> >>>>>    		min_cdclk = max(2 * 96000, min_cdclk);
> >>>>>
> >>>>>    	if (min_cdclk > dev_priv->max_cdclk_freq) {
> >>>> _______________________________________________
> >>>> Intel-gfx mailing list
> >>>> Intel-gfx@lists.freedesktop.org
> >>>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-11-03  4:13 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-25 22:02 [PATCH] drm/i915: set minimum CD clock to twice the BCLK abhay.kumar
2017-10-25 22:26 ` ✗ Fi.CI.BAT: warning for " Patchwork
2017-10-26  4:03 ` [PATCH] " Dhinakaran Pandiyan
2017-10-26  8:45   ` Jani Nikula
2017-10-26 19:10     ` Kumar, Abhay
2017-10-29  3:04       ` Kumar, Abhay
2017-10-31  0:21         ` Pandiyan, Dhinakaran
2017-10-31 23:43           ` Kumar, Abhay
2017-11-01  9:40             ` Jani Nikula
2017-11-03  3:54               ` Prusty, Subhransu S
2017-11-03  4:13             ` Prusty, Subhransu S [this message]
2018-02-14 17:59 ` Jani Nikula
     [not found]   ` <A49308764D41694491D5AFB53AB2F16D70A5CBD8@ORSMSX114.amr.corp.intel.com>
2018-03-23 19:33     ` FW: " Kumar, Abhay
2018-04-05 18:40 ` [PATCH v2] " Abhay Kumar
2018-04-06  7:21   ` kbuild test robot
2018-04-05 19:02 ` ✗ Fi.CI.BAT: failure for drm/i915: set minimum CD clock to twice the BCLK. (rev2) Patchwork
2018-04-05 20:37 ` [PATCH v2] drm/i915: set minimum CD clock to twice the BCLK Abhay Kumar
2018-04-06 13:47   ` Jani Nikula
2018-04-09 10:33     ` Ville Syrjälä
2018-04-09 22:11       ` Kumar, Abhay
2018-04-10  8:01         ` Jani Nikula
2018-04-10  8:49           ` Jani Nikula
2018-04-11  3:00             ` Kumar, Abhay
2018-04-17 19:06   ` [PATCH v3] " Abhay Kumar
2018-04-17 19:17     ` Kumar, Abhay
2018-04-17 19:28       ` Du,Wenkai
2018-04-18 10:49       ` Jani Nikula
2018-04-18 15:41         ` Ville Syrjälä
2018-04-19  1:19           ` Kumar, Abhay
2018-04-05 21:55 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev3) Patchwork
2018-04-05 22:10 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-06  0:38 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-04-17 19:22 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: set minimum CD clock to twice the BCLK. (rev4) Patchwork
2018-04-17 19:22 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-04-17 19:31 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-17 19:48 ` ✓ Fi.CI.IGT: " Patchwork
2018-04-18 10:24 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2018-04-18 10:24 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-04-18 10:40 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-18 11:07 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2018-04-18 11:07 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-04-18 11:23 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-18 12:25 ` ✓ Fi.CI.IGT: " Patchwork
2018-04-18 13:01 ` Patchwork

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