From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1765348AbcLWJVV (ORCPT ); Fri, 23 Dec 2016 04:21:21 -0500 Received: from mail-co1nam03on0061.outbound.protection.outlook.com ([104.47.40.61]:13605 "EHLO NAM03-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1764425AbcLWJVC (ORCPT ); Fri, 23 Dec 2016 04:21:02 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Appana Durga Kedareswara Rao To: Laurent Pinchart CC: "dan.j.williams@intel.com" , "vinod.koul@intel.com" , "michal.simek@xilinx.com" , Soren Brinkmann , "moritz.fischer@ettus.com" , "luis@debethencourt.com" , "Jose.Abreu@synopsys.com" , "dmaengine@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor Thread-Topic: [PATCH 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor Thread-Index: AQHSVuWKMv099oZq9EGvoV87jhWJ2KEKMEmAgAMg2sCAAbLoAIAGH0Pg Date: Fri, 23 Dec 2016 08:49:07 +0000 Message-ID: References: <1481814682-31780-1-git-send-email-appanad@xilinx.com> <5248247.n0rV8xBPrZ@avalon> <2156938.MvgiZll4tB@avalon> In-Reply-To: <2156938.MvgiZll4tB@avalon> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.94.175] Content-Type: text/plain; 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Thanks for the review... > > Hi Kedar, > > On Monday 19 Dec 2016 15:39:43 Appana Durga Kedareswara Rao wrote: > > Hi Laurent Pinchart, > > > > Thanks for the review... > > > > > > + if (!chan->idle) > > > > + return; > > > > > > Don't you need to perform the same check for the DMA and CDMA channels > ? > > > If so, shouldn't this be moved to common code ? > > > > Will fix it in v2... > > > > > There's another problem (not strictly introduced by this patch) I > > > wanted to mention. The append_desc_queue() function, called from > > > your tx_submit handler, appends descriptors to the pending_list. The > > > DMA engine API states that a transfer submitted by tx_submit will > > > not be executed until > > > .issue_pending() is called. However, if a transfer is in progress at > > > tx_submit time, I believe that the IRQ handler, at transfer > > > completion, will start the next transfer from the pending_list even > > > if > > > .issue_pending() hasn't been called for it. > > > > > > > if (list_empty(&chan->pending_list)) > > > > return; > > > > If user submits more than h/w limit then that case only driver will > > process The descriptors from the pending_list for other cases the > > pending_list will be Empty so driver just returns from there. > > I understand that, but that's not the problem. Your .tx_submit() handler calls > append_desc_queue() which adds the tx descriptor to the pending_list. If a > transfer is in progress at that time, I believe the transfer completion IRQ handler > will take the next descriptor from the pending_list and process it, even though > issue_pending() hasn't been called for it. > Thanks for the explanation... Agree will keep this my to-do list... Regards, Kedar. From mboxrd@z Thu Jan 1 00:00:00 1970 From: appana.durga.rao@xilinx.com (Appana Durga Kedareswara Rao) Date: Fri, 23 Dec 2016 08:49:07 +0000 Subject: [PATCH 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor In-Reply-To: <2156938.MvgiZll4tB@avalon> References: <1481814682-31780-1-git-send-email-appanad@xilinx.com> <5248247.n0rV8xBPrZ@avalon> <2156938.MvgiZll4tB@avalon> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Laurent Pinchart, Sorry for the delay in the reply. Thanks for the review... > > Hi Kedar, > > On Monday 19 Dec 2016 15:39:43 Appana Durga Kedareswara Rao wrote: > > Hi Laurent Pinchart, > > > > Thanks for the review... > > > > > > + if (!chan->idle) > > > > + return; > > > > > > Don't you need to perform the same check for the DMA and CDMA channels > ? > > > If so, shouldn't this be moved to common code ? > > > > Will fix it in v2... > > > > > There's another problem (not strictly introduced by this patch) I > > > wanted to mention. The append_desc_queue() function, called from > > > your tx_submit handler, appends descriptors to the pending_list. The > > > DMA engine API states that a transfer submitted by tx_submit will > > > not be executed until > > > .issue_pending() is called. However, if a transfer is in progress at > > > tx_submit time, I believe that the IRQ handler, at transfer > > > completion, will start the next transfer from the pending_list even > > > if > > > .issue_pending() hasn't been called for it. > > > > > > > if (list_empty(&chan->pending_list)) > > > > return; > > > > If user submits more than h/w limit then that case only driver will > > process The descriptors from the pending_list for other cases the > > pending_list will be Empty so driver just returns from there. > > I understand that, but that's not the problem. Your .tx_submit() handler calls > append_desc_queue() which adds the tx descriptor to the pending_list. If a > transfer is in progress at that time, I believe the transfer completion IRQ handler > will take the next descriptor from the pending_list and process it, even though > issue_pending() hasn't been called for it. > Thanks for the explanation... Agree will keep this my to-do list... Regards, Kedar.