Re: 32bit PAE PV guest on 64bit hypervisor

[Keir Fraser <keir.fraser@eu.citrix.com>]

On 14/04/2009 04:39, "Mukesh Rathor" <mukesh.rathor@oracle.com> wrote:

> During the clear fixmap, the pte high write results in clearing upper
> 32bits portion of pte/mfn, as a result the pte low write results in
> hypervisor getting wrong mfn, 7f36a instead of 1f7f36a.
> 
> I understand writeable page tables allow guest to do this, but I assume
> they are for mapping user and not kernel pages, in which case we should
> be doing a hypercall here? Or, would switching the order, first set low pte
> then high pte work?

Implementing clear_fixmap() with set_pte() is not correct, even on native.
Since it clears high then low, it temporarily leaves you with a possibly
invalid present PTE -- even on native this can cause problems if e.g., the
invalid PTE maps uncacheable I/O memory.

In our kernel we simply solved this by implementing __set_fixmap() with a
hypercall that could update all 64 bits at once. An alternative is indeed to
clear low then high. Basically, clearing a pte has to be done the opposite
way round to setting a pte.

 -- Keir