From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: Fwd: [PATCH 0/18] Nested Virtualization: Overview Date: Sun, 18 Apr 2010 18:52:30 +0100 Message-ID: References: <20100417114320.GC23260@8bytes.org> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20100417114320.GC23260@8bytes.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Joerg Roedel , Tim Deegan Cc: Christoph Egger , "xen-devel@lists.xensource.com" , Qing He List-Id: xen-devel@lists.xenproject.org On 17/04/2010 12:43, "Joerg Roedel" wrote: >> Your PDFs suggest that even on Intel CPUs, the nested hypervisor should >> always see SVM, not VMX. You shouldn't be surprised or offended if that >> isn't popular with Intel. :) > > Well, it would make sense for Intel too virtualize SVM because it > doesn't has the performance issues with lots and lots of emulated > vmread/vmwrite instructions that cause vmexits in the nested case. The > bigger problem with SVM on VMX is that it could never be complete > because afaik VMX has fewer intercepts than SVM. I don't think either VMX-on-SVM or SVM-on-VMX should be an aim. I mean, we'd have to completely emulate the underlying Intel processor, say, as AMD, to ensure SVM code paths get taken in the guest kernel/hypervisor. It's not really on. -- Keir