From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753445Ab3AXL3h (ORCPT ); Thu, 24 Jan 2013 06:29:37 -0500 Received: from bear.ext.ti.com ([192.94.94.41]:60774 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752532Ab3AXL32 (ORCPT ); Thu, 24 Jan 2013 06:29:28 -0500 From: "Mohammed, Afzal" To: Mike Turquette , "linux-arm-kernel@lists.infradead.org" , "linux-omap@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Stephen Boyd Subject: RE: [PATCH v2 1/2] clk: divider: prepare for minimum divider Thread-Topic: [PATCH v2 1/2] clk: divider: prepare for minimum divider Thread-Index: AQHN+V5a5bjFaLjo3UCX0TyVDxkD+ZhXFbKAgAE2ShA= Date: Thu, 24 Jan 2013 11:29:15 +0000 Message-ID: References: <6dc1c48cac5b2646a55da3079afb72f88e40c3bc.1358937138.git.afzal@ti.com> <20130123214053.9205.49804@quantum> In-Reply-To: <20130123214053.9205.49804@quantum> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.24.162.25] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id r0OBTa0n011129 Hi Mike, On Thu, Jan 24, 2013 at 03:10:53, Mike Turquette wrote: > Quoting Afzal Mohammed (2013-01-23 03:38:52) > > Some of clocks can have a limit on minimum divider value that can be > > programmed, prepare for such a support. > > Add a new field min_div for the basic divider clock and a new dynamic > > clock divider registration function where minimum divider value can > > be specified. Keep behaviour of existing divider clock registration > > functions, static initialization helpers as was earlier. > My first question is whether the minimum divider you plan to use is an > actual constraint of the hardware (e.g. the clock controller ip only > lets program two bits which divide by 4, 5, 6 or 7, where 4 is the > minimum divider) or if this is a functional constraint (e.g. the clock > hardware can divide by a lower value, but you never want that since it > results in non-functional video/audio/whatever). If this is more of a > functional constraint then perhaps a new api like clk_set_min_rate makes > more sense. It is a functional constraint: divider has 8 bits and it can have all possible values (0 to 255) and divider value corresponds to value set in the 8 bits. But depending on the modes the minimum value that can be configured (to get display working) varies. Eg. For raster mode (which the driver is presently supporting), it can take a minimum value of 2, while in LIDD (LCD interface display driver) mode it can take a min value of 1. Here min rate is not a constraint w.r.t divider in LCDC IP, but rather min divider. As it is the case, you prefer a clk_divider_set_min_div()? > > Secondly, have you looked into using the rate-table option provided by > the basic divider clock? Can you explain how this is not a good fit for > your needs? Perhaps there are too many divisor values so the table > would be large? Divider values can range from 2-255 (254 possible values), so I believe it is not a suitable candidate here (also divider to values have 1-to-1 mapping) Regards Afzal {.n++%ݶw{.n+{G{ayʇڙ,jfhz_(階ݢj"mG?&~iOzv^m ?I From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Mohammed, Afzal" Subject: RE: [PATCH v2 1/2] clk: divider: prepare for minimum divider Date: Thu, 24 Jan 2013 11:29:15 +0000 Message-ID: References: <6dc1c48cac5b2646a55da3079afb72f88e40c3bc.1358937138.git.afzal@ti.com> <20130123214053.9205.49804@quantum> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from bear.ext.ti.com ([192.94.94.41]:60774 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752532Ab3AXL32 (ORCPT ); Thu, 24 Jan 2013 06:29:28 -0500 In-Reply-To: <20130123214053.9205.49804@quantum> Content-Language: en-US Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: Mike Turquette , "linux-arm-kernel@lists.infradead.org" , "linux-omap@vger.kernel.org" , "linux-kernel@vger.kernel.org" Cc: Stephen Boyd SGkgTWlrZSwNCg0KT24gVGh1LCBKYW4gMjQsIDIwMTMgYXQgMDM6MTA6NTMsIE1pa2UgVHVycXVl dHRlIHdyb3RlOg0KPiBRdW90aW5nIEFmemFsIE1vaGFtbWVkICgyMDEzLTAxLTIzIDAzOjM4OjUy KQ0KDQo+ID4gU29tZSBvZiBjbG9ja3MgY2FuIGhhdmUgYSBsaW1pdCBvbiBtaW5pbXVtIGRpdmlk ZXIgdmFsdWUgdGhhdCBjYW4gYmUNCj4gPiBwcm9ncmFtbWVkLCBwcmVwYXJlIGZvciBzdWNoIGEg c3VwcG9ydC4NCg0KPiA+IEFkZCBhIG5ldyBmaWVsZCBtaW5fZGl2IGZvciB0aGUgYmFzaWMgZGl2 aWRlciBjbG9jayBhbmQgYSBuZXcgZHluYW1pYw0KPiA+IGNsb2NrIGRpdmlkZXIgcmVnaXN0cmF0 aW9uIGZ1bmN0aW9uIHdoZXJlIG1pbmltdW0gZGl2aWRlciB2YWx1ZSBjYW4NCj4gPiBiZSBzcGVj aWZpZWQuIEtlZXAgYmVoYXZpb3VyIG9mIGV4aXN0aW5nIGRpdmlkZXIgY2xvY2sgcmVnaXN0cmF0 aW9uDQo+ID4gZnVuY3Rpb25zLCBzdGF0aWMgaW5pdGlhbGl6YXRpb24gaGVscGVycyBhcyB3YXMg ZWFybGllci4NCg0KPiBNeSBmaXJzdCBxdWVzdGlvbiBpcyB3aGV0aGVyIHRoZSBtaW5pbXVtIGRp dmlkZXIgeW91IHBsYW4gdG8gdXNlIGlzIGFuDQo+IGFjdHVhbCBjb25zdHJhaW50IG9mIHRoZSBo YXJkd2FyZSAoZS5nLiB0aGUgY2xvY2sgY29udHJvbGxlciBpcCBvbmx5DQo+IGxldHMgcHJvZ3Jh bSB0d28gYml0cyB3aGljaCBkaXZpZGUgYnkgNCwgNSwgNiBvciA3LCB3aGVyZSA0IGlzIHRoZQ0K PiBtaW5pbXVtIGRpdmlkZXIpIG9yIGlmIHRoaXMgaXMgYSBmdW5jdGlvbmFsIGNvbnN0cmFpbnQg KGUuZy4gdGhlIGNsb2NrDQo+IGhhcmR3YXJlIGNhbiBkaXZpZGUgYnkgYSBsb3dlciB2YWx1ZSwg YnV0IHlvdSBuZXZlciB3YW50IHRoYXQgc2luY2UgaXQNCj4gcmVzdWx0cyBpbiBub24tZnVuY3Rp b25hbCB2aWRlby9hdWRpby93aGF0ZXZlcikuICBJZiB0aGlzIGlzIG1vcmUgb2YgYQ0KPiBmdW5j dGlvbmFsIGNvbnN0cmFpbnQgdGhlbiBwZXJoYXBzIGEgbmV3IGFwaSBsaWtlIGNsa19zZXRfbWlu X3JhdGUgbWFrZXMNCj4gbW9yZSBzZW5zZS4NCg0KSXQgaXMgYSBmdW5jdGlvbmFsIGNvbnN0cmFp bnQ6IGRpdmlkZXIgaGFzIDggYml0cyBhbmQgaXQgY2FuIGhhdmUNCmFsbCBwb3NzaWJsZSB2YWx1 ZXMgKDAgdG8gMjU1KSBhbmQgZGl2aWRlciB2YWx1ZSBjb3JyZXNwb25kcyB0bw0KdmFsdWUgc2V0 IGluIHRoZSA4IGJpdHMuIEJ1dCBkZXBlbmRpbmcgb24gdGhlIG1vZGVzIHRoZSBtaW5pbXVtDQp2 YWx1ZSB0aGF0IGNhbiBiZSBjb25maWd1cmVkICh0byBnZXQgZGlzcGxheSB3b3JraW5nKSB2YXJp ZXMuDQpFZy4gRm9yIHJhc3RlciBtb2RlICh3aGljaCB0aGUgZHJpdmVyIGlzIHByZXNlbnRseSBz dXBwb3J0aW5nKSwgaXQNCmNhbiB0YWtlIGEgbWluaW11bSB2YWx1ZSBvZiAyLCB3aGlsZSBpbiBM SUREIChMQ0QgaW50ZXJmYWNlIGRpc3BsYXkNCmRyaXZlcikgbW9kZSBpdCBjYW4gdGFrZSBhIG1p biB2YWx1ZSBvZiAxLg0KDQpIZXJlIG1pbiByYXRlIGlzIG5vdCBhIGNvbnN0cmFpbnQgdy5yLnQg ZGl2aWRlciBpbiBMQ0RDIElQLCBidXQNCnJhdGhlciBtaW4gZGl2aWRlci4NCg0KQXMgaXQgaXMg dGhlIGNhc2UsIHlvdSBwcmVmZXIgYSBjbGtfZGl2aWRlcl9zZXRfbWluX2RpdigpPw0KDQo+IA0K PiBTZWNvbmRseSwgaGF2ZSB5b3UgbG9va2VkIGludG8gdXNpbmcgdGhlIHJhdGUtdGFibGUgb3B0 aW9uIHByb3ZpZGVkIGJ5DQo+IHRoZSBiYXNpYyBkaXZpZGVyIGNsb2NrPyAgQ2FuIHlvdSBleHBs YWluIGhvdyB0aGlzIGlzIG5vdCBhIGdvb2QgZml0IGZvcg0KPiB5b3VyIG5lZWRzPyAgUGVyaGFw cyB0aGVyZSBhcmUgdG9vIG1hbnkgZGl2aXNvciB2YWx1ZXMgc28gdGhlIHRhYmxlDQo+IHdvdWxk IGJlIGxhcmdlPw0KDQpEaXZpZGVyIHZhbHVlcyBjYW4gcmFuZ2UgZnJvbSAyLTI1NSAoMjU0IHBv c3NpYmxlIHZhbHVlcyksIHNvIEkgYmVsaWV2ZQ0KaXQgaXMgbm90IGEgc3VpdGFibGUgY2FuZGlk YXRlIGhlcmUgKGFsc28gZGl2aWRlciB0byB2YWx1ZXMgaGF2ZSAxLXRvLTENCm1hcHBpbmcpDQoN ClJlZ2FyZHMNCkFmemFsDQoNCg0K From mboxrd@z Thu Jan 1 00:00:00 1970 From: afzal@ti.com (Mohammed, Afzal) Date: Thu, 24 Jan 2013 11:29:15 +0000 Subject: [PATCH v2 1/2] clk: divider: prepare for minimum divider In-Reply-To: <20130123214053.9205.49804@quantum> References: <6dc1c48cac5b2646a55da3079afb72f88e40c3bc.1358937138.git.afzal@ti.com> <20130123214053.9205.49804@quantum> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Mike, On Thu, Jan 24, 2013 at 03:10:53, Mike Turquette wrote: > Quoting Afzal Mohammed (2013-01-23 03:38:52) > > Some of clocks can have a limit on minimum divider value that can be > > programmed, prepare for such a support. > > Add a new field min_div for the basic divider clock and a new dynamic > > clock divider registration function where minimum divider value can > > be specified. Keep behaviour of existing divider clock registration > > functions, static initialization helpers as was earlier. > My first question is whether the minimum divider you plan to use is an > actual constraint of the hardware (e.g. the clock controller ip only > lets program two bits which divide by 4, 5, 6 or 7, where 4 is the > minimum divider) or if this is a functional constraint (e.g. the clock > hardware can divide by a lower value, but you never want that since it > results in non-functional video/audio/whatever). If this is more of a > functional constraint then perhaps a new api like clk_set_min_rate makes > more sense. It is a functional constraint: divider has 8 bits and it can have all possible values (0 to 255) and divider value corresponds to value set in the 8 bits. But depending on the modes the minimum value that can be configured (to get display working) varies. Eg. For raster mode (which the driver is presently supporting), it can take a minimum value of 2, while in LIDD (LCD interface display driver) mode it can take a min value of 1. Here min rate is not a constraint w.r.t divider in LCDC IP, but rather min divider. As it is the case, you prefer a clk_divider_set_min_div()? > > Secondly, have you looked into using the rate-table option provided by > the basic divider clock? Can you explain how this is not a good fit for > your needs? Perhaps there are too many divisor values so the table > would be large? Divider values can range from 2-255 (254 possible values), so I believe it is not a suitable candidate here (also divider to values have 1-to-1 mapping) Regards Afzal