Re: [RFC] Design for flag bit outputs from asms

From: Linus Torvalds <torvalds@linux-foundation.org>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Richard Henderson <rth@redhat.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Vladimir Makarov <vmakarov@redhat.com>,
	Jakub Jelinek <jakub@redhat.com>, Ingo Molnar <mingo@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Borislav Petkov <bp@alien8.de>,
	"gcc@gcc.gnu.org" <gcc@gcc.gnu.org>
Subject: Re: [RFC] Design for flag bit outputs from asms
Date: Mon, 4 May 2015 13:35:59 -0700	[thread overview]
Message-ID: <CA+55aFzCuu=n0SFiVyxv7ETxFTYZCBW-0S_RX=WZnwzORh4-7g@mail.gmail.com> (raw)
In-Reply-To: <5547D30B.2020507@zytor.com>

On Mon, May 4, 2015 at 1:14 PM, H. Peter Anvin <hpa@zytor.com> wrote:
>
> I would argue that for x86 what you actually want is to model the
> *conditions* that are available on the flags, not the flags themselves.

Yes. Otherwise it would be a nightmare to try to describe simple
conditions like "le", which a rather complicated combination of three
of the actual flag bits:

    ((SF ^^ OF) || ZF) = 1

which would just be ridiculously painful for (a) the user to describe
and (b) fior the compiler to recognize once described.

Now, I do admit that most of the cases where you'd use inline asm with
condition codes would probably fall into just simple "test ZF or CF".
But I could certainly imagine other cases.

                       Linus