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* [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-13 19:35 ` Vasily Khoruzhick
  0 siblings, 0 replies; 16+ messages in thread
From: Vasily Khoruzhick @ 2021-09-13 19:35 UTC (permalink / raw)
  To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Lyude Paul, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel
  Cc: Vasily Khoruzhick

Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
control brightness, apparently needs a delay before setting brightness
after power on. Without this delay the panel does accept the setting
and may come up with some arbitrary brightness (sometimes it's too dark,
sometimes it's too bright, I wasn't able to find a system).

I don't have access to the spec, so I'm not sure if it's expected
behavior or a quirk for particular device.

Delay was chosen by experiment: it works with 100ms, but fails with
anything lower than 75ms.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 4f8337c7fd2e..c4f35e1b5870 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
 
 	ctrl = old_ctrl;
 	if (panel->backlight.edp.intel.sdr_uses_aux) {
+		/* Wait 100ms to ensure that panel is ready otherwise it may not
+		 * set chosen backlight level
+		 */
+		msleep(100);
 		ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
 		intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
 	} else {
-- 
2.33.0


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-13 19:35 ` Vasily Khoruzhick
  0 siblings, 0 replies; 16+ messages in thread
From: Vasily Khoruzhick @ 2021-09-13 19:35 UTC (permalink / raw)
  To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Lyude Paul, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel
  Cc: Vasily Khoruzhick

Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
control brightness, apparently needs a delay before setting brightness
after power on. Without this delay the panel does accept the setting
and may come up with some arbitrary brightness (sometimes it's too dark,
sometimes it's too bright, I wasn't able to find a system).

I don't have access to the spec, so I'm not sure if it's expected
behavior or a quirk for particular device.

Delay was chosen by experiment: it works with 100ms, but fails with
anything lower than 75ms.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 4f8337c7fd2e..c4f35e1b5870 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
 
 	ctrl = old_ctrl;
 	if (panel->backlight.edp.intel.sdr_uses_aux) {
+		/* Wait 100ms to ensure that panel is ready otherwise it may not
+		 * set chosen backlight level
+		 */
+		msleep(100);
 		ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
 		intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
 	} else {
-- 
2.33.0


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-13 19:35 ` [Intel-gfx] " Vasily Khoruzhick
  (?)
@ 2021-09-13 22:34 ` Patchwork
  -1 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2021-09-13 22:34 UTC (permalink / raw)
  To: Vasily Khoruzhick; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 2750 bytes --]

== Series Details ==

Series: drm/i915/dp: add a delay before setting panel brightness after power on
URL   : https://patchwork.freedesktop.org/series/94629/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10575 -> Patchwork_21029
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/index.html

Known issues
------------

  Here are the changes found in Patchwork_21029 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][1] ([fdo#109271]) +3 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/fi-bdw-5557u/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html

  
#### Possible fixes ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          [DMESG-WARN][3] ([i915#2203] / [i915#2868]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303


Participating hosts (45 -> 38)
------------------------------

  Missing    (7): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-4 fi-bdw-samus bat-jsl-2 bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10575 -> Patchwork_21029

  CI-20190529: 20190529
  CI_DRM_10575: 514f6ec2135c56ad2110341540b69398809fb426 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6209: 07d6594ed02f55b68d64fa6dd7f80cfbc1ce4ef8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21029: fb79b56fa83c0c4e0b438d1d14196fd64232260a @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

fb79b56fa83c drm/i915/dp: add a delay before setting panel brightness after power on

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/index.html

[-- Attachment #2: Type: text/html, Size: 3405 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-13 19:35 ` [Intel-gfx] " Vasily Khoruzhick
  (?)
  (?)
@ 2021-09-14  1:58 ` Patchwork
  -1 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2021-09-14  1:58 UTC (permalink / raw)
  To: Vasily Khoruzhick; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30294 bytes --]

== Series Details ==

Series: drm/i915/dp: add a delay before setting panel brightness after power on
URL   : https://patchwork.freedesktop.org/series/94629/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10575_full -> Patchwork_21029_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_21029_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@legacy-engines-mixed-process:
    - shard-snb:          NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-snb6/igt@gem_ctx_persistence@legacy-engines-mixed-process.html

  * igt@gem_ctx_persistence@many-contexts:
    - shard-tglb:         NOTRUN -> [FAIL][2] ([i915#2410])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@gem_ctx_persistence@many-contexts.html

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-tglb:         [PASS][3] -> [TIMEOUT][4] ([i915#3063])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-tglb1/igt@gem_eio@in-flight-contexts-1us.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb5/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-apl:          NOTRUN -> [FAIL][5] ([i915#2846])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl3/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-kbl:          [PASS][6] -> [FAIL][7] ([i915#2842]) +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-kbl3/igt@gem_exec_fair@basic-none@vecs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl6/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         NOTRUN -> [FAIL][8] ([i915#2842])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-iclb:         [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-iclb7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb3/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-tglb:         [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-tglb3/igt@gem_exec_fair@basic-pace@rcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][13] ([i915#2842])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_fair@basic-sync@rcs0:
    - shard-kbl:          [PASS][14] -> [SKIP][15] ([fdo#109271])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-kbl7/igt@gem_exec_fair@basic-sync@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl1/igt@gem_exec_fair@basic-sync@rcs0.html

  * igt@gem_pread@exhaustion:
    - shard-apl:          NOTRUN -> [WARN][16] ([i915#2658])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl3/igt@gem_pread@exhaustion.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
    - shard-iclb:         NOTRUN -> [SKIP][17] ([i915#768])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-tglb:         NOTRUN -> [SKIP][18] ([fdo#110542])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-kbl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#3323])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl3/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@input-checking:
    - shard-snb:          NOTRUN -> [DMESG-WARN][20] ([i915#3002])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-snb6/igt@gem_userptr_blits@input-checking.html

  * igt@gem_userptr_blits@unsync-unmap-after-close:
    - shard-tglb:         NOTRUN -> [SKIP][21] ([i915#3297])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb8/igt@gem_userptr_blits@unsync-unmap-after-close.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-snb:          NOTRUN -> [FAIL][22] ([i915#2724])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-snb6/igt@gem_userptr_blits@vma-merge.html

  * igt@gen7_exec_parse@oacontrol-tracking:
    - shard-tglb:         NOTRUN -> [SKIP][23] ([fdo#109289]) +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@gen7_exec_parse@oacontrol-tracking.html

  * igt@gen9_exec_parse@bb-secure:
    - shard-iclb:         NOTRUN -> [SKIP][24] ([i915#2856])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@gen9_exec_parse@bb-secure.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-tglb:         NOTRUN -> [SKIP][25] ([i915#2856]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_pm_rpm@modeset-non-lpsp:
    - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#111644] / [i915#1397] / [i915#2411])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@i915_pm_rpm@modeset-non-lpsp.html

  * igt@i915_selftest@live@evict:
    - shard-skl:          NOTRUN -> [INCOMPLETE][27] ([i915#198])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl8/igt@i915_selftest@live@evict.html

  * igt@i915_selftest@live@gt_lrc:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][28] ([i915#2373])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_pm:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][29] ([i915#1759] / [i915#2291])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@i915_selftest@live@gt_pm.html
    - shard-skl:          NOTRUN -> [DMESG-FAIL][30] ([i915#1886] / [i915#2291])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl8/igt@i915_selftest@live@gt_pm.html

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][31] ([fdo#111614]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3777]) +2 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-tglb:         NOTRUN -> [SKIP][33] ([fdo#111615]) +2 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
    - shard-iclb:         NOTRUN -> [SKIP][34] ([fdo#109278] / [i915#3886]) +2 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3886]) +11 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl2/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3886]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl1/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][37] ([i915#3689]) +4 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs.html

  * igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-skl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886]) +1 similar issue
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl2/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][39] ([i915#3689] / [i915#3886]) +2 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
    - shard-snb:          NOTRUN -> [SKIP][40] ([fdo#109271]) +270 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-snb6/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_chamelium@vga-hpd:
    - shard-apl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +18 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl2/igt@kms_chamelium@vga-hpd.html

  * igt@kms_chamelium@vga-hpd-after-suspend:
    - shard-iclb:         NOTRUN -> [SKIP][42] ([fdo#109284] / [fdo#111827]) +1 similar issue
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@kms_chamelium@vga-hpd-after-suspend.html

  * igt@kms_chamelium@vga-hpd-for-each-pipe:
    - shard-skl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl8/igt@kms_chamelium@vga-hpd-for-each-pipe.html

  * igt@kms_color_chamelium@pipe-a-ctm-0-25:
    - shard-kbl:          NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-snb:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +10 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-snb6/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-invalid-degamma-lut-sizes:
    - shard-tglb:         NOTRUN -> [SKIP][46] ([fdo#109284] / [fdo#111827]) +9 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_color_chamelium@pipe-invalid-degamma-lut-sizes.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-tglb:         NOTRUN -> [SKIP][47] ([i915#3116])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][48] ([i915#1319])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl3/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@type1:
    - shard-tglb:         NOTRUN -> [SKIP][49] ([fdo#111828])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@pipe-b-cursor-32x10-random:
    - shard-tglb:         NOTRUN -> [SKIP][50] ([i915#3359]) +2 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb8/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109278] / [fdo#109279])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-apl:          [PASS][52] -> [DMESG-WARN][53] ([i915#180]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-apl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-d-cursor-32x32-onscreen:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109278]) +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@kms_cursor_crc@pipe-d-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-32x32-sliding:
    - shard-tglb:         NOTRUN -> [SKIP][55] ([i915#3319]) +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-32x32-sliding.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][56] ([fdo#109279] / [i915#3359]) +5 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][57] -> [FAIL][58] ([i915#2346])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][59] -> [FAIL][60] ([i915#2122])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-glk6/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-glk5/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1:
    - shard-apl:          NOTRUN -> [FAIL][61] ([i915#79])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#79])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-skl4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@plain-flip-ts-check@a-edp1:
    - shard-skl:          [PASS][64] -> [FAIL][65] ([i915#2122])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-skl7/igt@kms_flip@plain-flip-ts-check@a-edp1.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl10/igt@kms_flip@plain-flip-ts-check@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-kbl:          NOTRUN -> [SKIP][66] ([fdo#109271]) +30 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][67] -> [DMESG-WARN][68] ([i915#180]) +4 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt:
    - shard-tglb:         NOTRUN -> [SKIP][69] ([fdo#111825]) +19 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt:
    - shard-iclb:         NOTRUN -> [SKIP][70] ([fdo#109280]) +5 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-tglb:         NOTRUN -> [SKIP][71] ([i915#1187])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][72] ([fdo#108145] / [i915#265]) +2 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
    - shard-kbl:          NOTRUN -> [FAIL][73] ([i915#265])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl3/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][74] -> [FAIL][75] ([fdo#108145] / [i915#265])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          NOTRUN -> [FAIL][76] ([fdo#108145] / [i915#265]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_plane_lowres@pipe-d-tiling-yf:
    - shard-tglb:         NOTRUN -> [SKIP][77] ([fdo#112054]) +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_plane_lowres@pipe-d-tiling-yf.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
    - shard-apl:          NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658]) +3 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
    - shard-iclb:         NOTRUN -> [SKIP][79] ([i915#658])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
    - shard-skl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +1 similar issue
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area-1:
    - shard-tglb:         NOTRUN -> [SKIP][81] ([i915#2920]) +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@kms_psr2_sf@plane-move-sf-dmg-area-1.html

  * igt@kms_psr@psr2_primary_blt:
    - shard-iclb:         [PASS][82] -> [SKIP][83] ([fdo#109441]) +1 similar issue
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-iclb2/igt@kms_psr@psr2_primary_blt.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb7/igt@kms_psr@psr2_primary_blt.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-tglb:         NOTRUN -> [FAIL][84] ([i915#132] / [i915#3467]) +2 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_sysfs_edid_timing:
    - shard-apl:          NOTRUN -> [FAIL][85] ([IGT#2])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl1/igt@kms_sysfs_edid_timing.html

  * igt@kms_writeback@writeback-check-output:
    - shard-apl:          NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#2437])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl1/igt@kms_writeback@writeback-check-output.html
    - shard-iclb:         NOTRUN -> [SKIP][87] ([i915#2437])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@kms_writeback@writeback-check-output.html
    - shard-tglb:         NOTRUN -> [SKIP][88] ([i915#2437])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@kms_writeback@writeback-check-output.html

  * igt@perf@gen12-mi-rpc:
    - shard-skl:          NOTRUN -> [SKIP][89] ([fdo#109271]) +64 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl8/igt@perf@gen12-mi-rpc.html

  * igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name:
    - shard-apl:          NOTRUN -> [SKIP][90] ([fdo#109271]) +209 similar issues
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl3/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html

  * igt@prime_nv_pcopy@test1_macro:
    - shard-tglb:         NOTRUN -> [SKIP][91] ([fdo#109291]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb3/igt@prime_nv_pcopy@test1_macro.html

  * igt@sysfs_clients@create:
    - shard-tglb:         NOTRUN -> [SKIP][92] ([i915#2994]) +2 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb2/igt@sysfs_clients@create.html

  * igt@sysfs_clients@split-10:
    - shard-skl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl8/igt@sysfs_clients@split-10.html
    - shard-apl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994]) +1 similar issue
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-apl2/igt@sysfs_clients@split-10.html

  
#### Possible fixes ####

  * igt@fbdev@unaligned-write:
    - {shard-rkl}:        [SKIP][95] ([i915#2582]) -> [PASS][96] +1 similar issue
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-5/igt@fbdev@unaligned-write.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-6/igt@fbdev@unaligned-write.html

  * igt@feature_discovery@psr2:
    - shard-iclb:         [SKIP][97] ([i915#658]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-iclb5/igt@feature_discovery@psr2.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb2/igt@feature_discovery@psr2.html

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
    - shard-kbl:          [DMESG-WARN][99] ([i915#180]) -> [PASS][100] +3 similar issues
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@rcs0.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl7/igt@gem_ctx_isolation@preservation-s3@rcs0.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [TIMEOUT][101] ([i915#2369] / [i915#3063] / [i915#3648]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-tglb8/igt@gem_eio@unwedge-stress.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb8/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-kbl:          [FAIL][103] ([i915#2846]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-kbl1/igt@gem_exec_fair@basic-deadline.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
    - {shard-rkl}:        [FAIL][105] ([i915#2846]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-tglb:         [FAIL][107] ([i915#2842]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-tglb7/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-kbl:          [FAIL][109] ([i915#2842]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-kbl2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - {shard-rkl}:        [FAIL][111] ([i915#2842]) -> [PASS][112] +1 similar issue
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-5/igt@gem_exec_fair@basic-pace@vcs0.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-5/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          [SKIP][113] ([fdo#109271]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-kbl3/igt@gem_exec_fair@basic-pace@vecs0.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - {shard-rkl}:        [INCOMPLETE][115] ([i915#3189]) -> [PASS][116]
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-2/igt@gem_exec_suspend@basic-s4-devices.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_fenced_exec_thrash@no-spare-fences:
    - shard-snb:          [INCOMPLETE][117] ([i915#2055]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-snb6/igt@gem_fenced_exec_thrash@no-spare-fences.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-snb5/igt@gem_fenced_exec_thrash@no-spare-fences.html

  * igt@i915_pm_backlight@fade:
    - {shard-rkl}:        [SKIP][119] ([i915#3012]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-1/igt@i915_pm_backlight@fade.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-6/igt@i915_pm_backlight@fade.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [FAIL][121] ([i915#454]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-iclb6/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - {shard-rkl}:        [SKIP][123] ([i915#1397]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-1/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-skl:          [INCOMPLETE][125] ([i915#146] / [i915#151]) -> [PASS][126]
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-skl8/igt@i915_pm_rpm@system-suspend-execbuf.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl2/igt@i915_pm_rpm@system-suspend-execbuf.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-skl:          [FAIL][127] ([i915#2521]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-skl1/igt@kms_async_flips@alternate-sync-async-flip.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - shard-glk:          [DMESG-WARN][129] ([i915#118] / [i915#95]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-glk8/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-glk6/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0:
    - {shard-rkl}:        [SKIP][131] ([i915#3721]) -> [PASS][132] +3 similar issues
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-1/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - {shard-rkl}:        [SKIP][133] ([i915#3638]) -> [PASS][134] +1 similar issue
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-1/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-6/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_color@pipe-b-ctm-0-75:
    - {shard-rkl}:        [SKIP][135] ([i915#1149] / [i915#1849] / [i915#4070]) -> [PASS][136] +2 similar issues
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-1/igt@kms_color@pipe-b-ctm-0-75.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-6/igt@kms_color@pipe-b-ctm-0-75.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen:
    - {shard-rkl}:        [SKIP][137] ([fdo#112022] / [i915#4070]) -> [PASS][138] +2 similar issues
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10575/shard-rkl-5/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html

  * igt@kms_cursor_edge_walk@pipe-a-256x256-right-edge:
    - {shard-rkl}:        [SKIP][139] ([i915#1849] / [i915#4070]) -> [PASS][140] +3 similar issues
   [139]:

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21029/index.html

[-- Attachment #2: Type: text/html, Size: 33722 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-13 19:35 ` [Intel-gfx] " Vasily Khoruzhick
@ 2021-09-14  9:09   ` Jani Nikula
  -1 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2021-09-14  9:09 UTC (permalink / raw)
  To: Vasily Khoruzhick, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Lyude Paul, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel
  Cc: Vasily Khoruzhick

On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> control brightness, apparently needs a delay before setting brightness
> after power on. Without this delay the panel does accept the setting
> and may come up with some arbitrary brightness (sometimes it's too dark,
> sometimes it's too bright, I wasn't able to find a system).
>
> I don't have access to the spec, so I'm not sure if it's expected
> behavior or a quirk for particular device.
>
> Delay was chosen by experiment: it works with 100ms, but fails with
> anything lower than 75ms.

Looks like we don't respect the panel delays for DPCD backlight. The
values are used for setting up the panel power sequencer, and thus PWM
based backlight, but we should probably use the delays in DPCD backlight
code too.

BR,
Jani.


>
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 4f8337c7fd2e..c4f35e1b5870 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
>  
>  	ctrl = old_ctrl;
>  	if (panel->backlight.edp.intel.sdr_uses_aux) {
> +		/* Wait 100ms to ensure that panel is ready otherwise it may not
> +		 * set chosen backlight level
> +		 */
> +		msleep(100);
>  		ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
>  		intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
>  	} else {

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-14  9:09   ` Jani Nikula
  0 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2021-09-14  9:09 UTC (permalink / raw)
  To: Vasily Khoruzhick, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Lyude Paul, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel
  Cc: Vasily Khoruzhick

On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> control brightness, apparently needs a delay before setting brightness
> after power on. Without this delay the panel does accept the setting
> and may come up with some arbitrary brightness (sometimes it's too dark,
> sometimes it's too bright, I wasn't able to find a system).
>
> I don't have access to the spec, so I'm not sure if it's expected
> behavior or a quirk for particular device.
>
> Delay was chosen by experiment: it works with 100ms, but fails with
> anything lower than 75ms.

Looks like we don't respect the panel delays for DPCD backlight. The
values are used for setting up the panel power sequencer, and thus PWM
based backlight, but we should probably use the delays in DPCD backlight
code too.

BR,
Jani.


>
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 4f8337c7fd2e..c4f35e1b5870 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state,
>  
>  	ctrl = old_ctrl;
>  	if (panel->backlight.edp.intel.sdr_uses_aux) {
> +		/* Wait 100ms to ensure that panel is ready otherwise it may not
> +		 * set chosen backlight level
> +		 */
> +		msleep(100);
>  		ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
>  		intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
>  	} else {

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-14  9:09   ` [Intel-gfx] " Jani Nikula
@ 2021-09-14 21:08     ` Lyude Paul
  -1 siblings, 0 replies; 16+ messages in thread
From: Lyude Paul @ 2021-09-14 21:08 UTC (permalink / raw)
  To: Jani Nikula, Vasily Khoruzhick, Joonas Lahtinen, Rodrigo Vivi,
	David Airlie, Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel

On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> > control brightness, apparently needs a delay before setting brightness
> > after power on. Without this delay the panel does accept the setting
> > and may come up with some arbitrary brightness (sometimes it's too dark,
> > sometimes it's too bright, I wasn't able to find a system).
> > 
> > I don't have access to the spec, so I'm not sure if it's expected
> > behavior or a quirk for particular device.
> > 
> > Delay was chosen by experiment: it works with 100ms, but fails with
> > anything lower than 75ms.
> 
> Looks like we don't respect the panel delays for DPCD backlight. The
> values are used for setting up the panel power sequencer, and thus PWM
> based backlight, but we should probably use the delays in DPCD backlight
> code too.

This makes sense to me, you're referring to the panel delays in the VBT
correct?

> 
> BR,
> Jani.
> 
> 
> > 
> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > index 4f8337c7fd2e..c4f35e1b5870 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
> > intel_crtc_state *crtc_state,
> >  
> >         ctrl = old_ctrl;
> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
> > +               /* Wait 100ms to ensure that panel is ready otherwise it
> > may not
> > +                * set chosen backlight level
> > +                */
> > +               msleep(100);
> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> >         } else {
> 

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat


^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-14 21:08     ` Lyude Paul
  0 siblings, 0 replies; 16+ messages in thread
From: Lyude Paul @ 2021-09-14 21:08 UTC (permalink / raw)
  To: Jani Nikula, Vasily Khoruzhick, Joonas Lahtinen, Rodrigo Vivi,
	David Airlie, Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel

On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> > control brightness, apparently needs a delay before setting brightness
> > after power on. Without this delay the panel does accept the setting
> > and may come up with some arbitrary brightness (sometimes it's too dark,
> > sometimes it's too bright, I wasn't able to find a system).
> > 
> > I don't have access to the spec, so I'm not sure if it's expected
> > behavior or a quirk for particular device.
> > 
> > Delay was chosen by experiment: it works with 100ms, but fails with
> > anything lower than 75ms.
> 
> Looks like we don't respect the panel delays for DPCD backlight. The
> values are used for setting up the panel power sequencer, and thus PWM
> based backlight, but we should probably use the delays in DPCD backlight
> code too.

This makes sense to me, you're referring to the panel delays in the VBT
correct?

> 
> BR,
> Jani.
> 
> 
> > 
> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > index 4f8337c7fd2e..c4f35e1b5870 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
> > intel_crtc_state *crtc_state,
> >  
> >         ctrl = old_ctrl;
> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
> > +               /* Wait 100ms to ensure that panel is ready otherwise it
> > may not
> > +                * set chosen backlight level
> > +                */
> > +               msleep(100);
> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> >         } else {
> 

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat


^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-14 21:08     ` [Intel-gfx] " Lyude Paul
@ 2021-09-14 22:31       ` Jani Nikula
  -1 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2021-09-14 22:31 UTC (permalink / raw)
  To: Lyude Paul, Vasily Khoruzhick, Joonas Lahtinen, Rodrigo Vivi,
	David Airlie, Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel

On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
> On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
>> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
>> > control brightness, apparently needs a delay before setting brightness
>> > after power on. Without this delay the panel does accept the setting
>> > and may come up with some arbitrary brightness (sometimes it's too dark,
>> > sometimes it's too bright, I wasn't able to find a system).
>> > 
>> > I don't have access to the spec, so I'm not sure if it's expected
>> > behavior or a quirk for particular device.
>> > 
>> > Delay was chosen by experiment: it works with 100ms, but fails with
>> > anything lower than 75ms.
>> 
>> Looks like we don't respect the panel delays for DPCD backlight. The
>> values are used for setting up the panel power sequencer, and thus PWM
>> based backlight, but we should probably use the delays in DPCD backlight
>> code too.
>
> This makes sense to me, you're referring to the panel delays in the VBT
> correct?

Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
aren't applied to DPCD backlight, I think it would make sense if they
were.

BR,
Jani.

>
>> 
>> BR,
>> Jani.
>> 
>> 
>> > 
>> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
>> >  1 file changed, 4 insertions(+)
>> > 
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > index 4f8337c7fd2e..c4f35e1b5870 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
>> > intel_crtc_state *crtc_state,
>> >  
>> >         ctrl = old_ctrl;
>> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
>> > +               /* Wait 100ms to ensure that panel is ready otherwise it
>> > may not
>> > +                * set chosen backlight level
>> > +                */
>> > +               msleep(100);
>> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
>> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
>> >         } else {
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-14 22:31       ` Jani Nikula
  0 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2021-09-14 22:31 UTC (permalink / raw)
  To: Lyude Paul, Vasily Khoruzhick, Joonas Lahtinen, Rodrigo Vivi,
	David Airlie, Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx,
	dri-devel

On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
> On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
>> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
>> > control brightness, apparently needs a delay before setting brightness
>> > after power on. Without this delay the panel does accept the setting
>> > and may come up with some arbitrary brightness (sometimes it's too dark,
>> > sometimes it's too bright, I wasn't able to find a system).
>> > 
>> > I don't have access to the spec, so I'm not sure if it's expected
>> > behavior or a quirk for particular device.
>> > 
>> > Delay was chosen by experiment: it works with 100ms, but fails with
>> > anything lower than 75ms.
>> 
>> Looks like we don't respect the panel delays for DPCD backlight. The
>> values are used for setting up the panel power sequencer, and thus PWM
>> based backlight, but we should probably use the delays in DPCD backlight
>> code too.
>
> This makes sense to me, you're referring to the panel delays in the VBT
> correct?

Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
aren't applied to DPCD backlight, I think it would make sense if they
were.

BR,
Jani.

>
>> 
>> BR,
>> Jani.
>> 
>> 
>> > 
>> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
>> >  1 file changed, 4 insertions(+)
>> > 
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > index 4f8337c7fd2e..c4f35e1b5870 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
>> > intel_crtc_state *crtc_state,
>> >  
>> >         ctrl = old_ctrl;
>> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
>> > +               /* Wait 100ms to ensure that panel is ready otherwise it
>> > may not
>> > +                * set chosen backlight level
>> > +                */
>> > +               msleep(100);
>> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
>> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
>> >         } else {
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-14 22:31       ` [Intel-gfx] " Jani Nikula
@ 2021-09-15  1:10         ` Vasily Khoruzhick
  -1 siblings, 0 replies; 16+ messages in thread
From: Vasily Khoruzhick @ 2021-09-15  1:10 UTC (permalink / raw)
  To: Jani Nikula
  Cc: Lyude Paul, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx, dri-devel

On Tue, Sep 14, 2021 at 3:31 PM Jani Nikula <jani.nikula@linux.intel.com> wrote:
>
> On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
> > On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> >> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> >> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> >> > control brightness, apparently needs a delay before setting brightness
> >> > after power on. Without this delay the panel does accept the setting
> >> > and may come up with some arbitrary brightness (sometimes it's too dark,
> >> > sometimes it's too bright, I wasn't able to find a system).
> >> >
> >> > I don't have access to the spec, so I'm not sure if it's expected
> >> > behavior or a quirk for particular device.
> >> >
> >> > Delay was chosen by experiment: it works with 100ms, but fails with
> >> > anything lower than 75ms.
> >>
> >> Looks like we don't respect the panel delays for DPCD backlight. The
> >> values are used for setting up the panel power sequencer, and thus PWM
> >> based backlight, but we should probably use the delays in DPCD backlight
> >> code too.
> >
> > This makes sense to me, you're referring to the panel delays in the VBT
> > correct?
>
> Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
> aren't applied to DPCD backlight, I think it would make sense if they
> were.

I guess it explains why it usually stops working after suspend.
Probably BIOS doesn't re-init the power sequencer on resume.

> BR,
> Jani.
>
> >
> >>
> >> BR,
> >> Jani.
> >>
> >>
> >> >
> >> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> >> > ---
> >> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
> >> >  1 file changed, 4 insertions(+)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > index 4f8337c7fd2e..c4f35e1b5870 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
> >> > intel_crtc_state *crtc_state,
> >> >
> >> >         ctrl = old_ctrl;
> >> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
> >> > +               /* Wait 100ms to ensure that panel is ready otherwise it
> >> > may not
> >> > +                * set chosen backlight level
> >> > +                */
> >> > +               msleep(100);
> >> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
> >> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> >> >         } else {
> >>
>
> --
> Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-15  1:10         ` Vasily Khoruzhick
  0 siblings, 0 replies; 16+ messages in thread
From: Vasily Khoruzhick @ 2021-09-15  1:10 UTC (permalink / raw)
  To: Jani Nikula
  Cc: Lyude Paul, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx, dri-devel

On Tue, Sep 14, 2021 at 3:31 PM Jani Nikula <jani.nikula@linux.intel.com> wrote:
>
> On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
> > On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> >> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> >> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> >> > control brightness, apparently needs a delay before setting brightness
> >> > after power on. Without this delay the panel does accept the setting
> >> > and may come up with some arbitrary brightness (sometimes it's too dark,
> >> > sometimes it's too bright, I wasn't able to find a system).
> >> >
> >> > I don't have access to the spec, so I'm not sure if it's expected
> >> > behavior or a quirk for particular device.
> >> >
> >> > Delay was chosen by experiment: it works with 100ms, but fails with
> >> > anything lower than 75ms.
> >>
> >> Looks like we don't respect the panel delays for DPCD backlight. The
> >> values are used for setting up the panel power sequencer, and thus PWM
> >> based backlight, but we should probably use the delays in DPCD backlight
> >> code too.
> >
> > This makes sense to me, you're referring to the panel delays in the VBT
> > correct?
>
> Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
> aren't applied to DPCD backlight, I think it would make sense if they
> were.

I guess it explains why it usually stops working after suspend.
Probably BIOS doesn't re-init the power sequencer on resume.

> BR,
> Jani.
>
> >
> >>
> >> BR,
> >> Jani.
> >>
> >>
> >> >
> >> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> >> > ---
> >> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
> >> >  1 file changed, 4 insertions(+)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > index 4f8337c7fd2e..c4f35e1b5870 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
> >> > intel_crtc_state *crtc_state,
> >> >
> >> >         ctrl = old_ctrl;
> >> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
> >> > +               /* Wait 100ms to ensure that panel is ready otherwise it
> >> > may not
> >> > +                * set chosen backlight level
> >> > +                */
> >> > +               msleep(100);
> >> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
> >> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> >> >         } else {
> >>
>
> --
> Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-15  1:10         ` [Intel-gfx] " Vasily Khoruzhick
@ 2021-09-15  8:47           ` Jani Nikula
  -1 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2021-09-15  8:47 UTC (permalink / raw)
  To: Vasily Khoruzhick
  Cc: Lyude Paul, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx, dri-devel

On Tue, 14 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> On Tue, Sep 14, 2021 at 3:31 PM Jani Nikula <jani.nikula@linux.intel.com> wrote:
>>
>> On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
>> > On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
>> >> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>> >> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
>> >> > control brightness, apparently needs a delay before setting brightness
>> >> > after power on. Without this delay the panel does accept the setting
>> >> > and may come up with some arbitrary brightness (sometimes it's too dark,
>> >> > sometimes it's too bright, I wasn't able to find a system).
>> >> >
>> >> > I don't have access to the spec, so I'm not sure if it's expected
>> >> > behavior or a quirk for particular device.
>> >> >
>> >> > Delay was chosen by experiment: it works with 100ms, but fails with
>> >> > anything lower than 75ms.
>> >>
>> >> Looks like we don't respect the panel delays for DPCD backlight. The
>> >> values are used for setting up the panel power sequencer, and thus PWM
>> >> based backlight, but we should probably use the delays in DPCD backlight
>> >> code too.
>> >
>> > This makes sense to me, you're referring to the panel delays in the VBT
>> > correct?
>>
>> Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
>> aren't applied to DPCD backlight, I think it would make sense if they
>> were.
>
> I guess it explains why it usually stops working after suspend.
> Probably BIOS doesn't re-init the power sequencer on resume.

The point is, the DPCD backlight isn't driven via the power sequencer,
while the PWM pin would be.

Please file a bug at [1], and attach /sys/kernel/debug/dri/0/i915_vbt as
well as dmesg from boot with drm.debug=14 module parameter set.

Thanks,
Jani.


[1] https://gitlab.freedesktop.org/drm/intel/issues/new



>
>> BR,
>> Jani.
>>
>> >
>> >>
>> >> BR,
>> >> Jani.
>> >>
>> >>
>> >> >
>> >> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
>> >> > ---
>> >> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
>> >> >  1 file changed, 4 insertions(+)
>> >> >
>> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > index 4f8337c7fd2e..c4f35e1b5870 100644
>> >> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
>> >> > intel_crtc_state *crtc_state,
>> >> >
>> >> >         ctrl = old_ctrl;
>> >> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
>> >> > +               /* Wait 100ms to ensure that panel is ready otherwise it
>> >> > may not
>> >> > +                * set chosen backlight level
>> >> > +                */
>> >> > +               msleep(100);
>> >> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
>> >> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
>> >> >         } else {
>> >>
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-15  8:47           ` Jani Nikula
  0 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2021-09-15  8:47 UTC (permalink / raw)
  To: Vasily Khoruzhick
  Cc: Lyude Paul, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx, dri-devel

On Tue, 14 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> On Tue, Sep 14, 2021 at 3:31 PM Jani Nikula <jani.nikula@linux.intel.com> wrote:
>>
>> On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
>> > On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
>> >> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
>> >> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
>> >> > control brightness, apparently needs a delay before setting brightness
>> >> > after power on. Without this delay the panel does accept the setting
>> >> > and may come up with some arbitrary brightness (sometimes it's too dark,
>> >> > sometimes it's too bright, I wasn't able to find a system).
>> >> >
>> >> > I don't have access to the spec, so I'm not sure if it's expected
>> >> > behavior or a quirk for particular device.
>> >> >
>> >> > Delay was chosen by experiment: it works with 100ms, but fails with
>> >> > anything lower than 75ms.
>> >>
>> >> Looks like we don't respect the panel delays for DPCD backlight. The
>> >> values are used for setting up the panel power sequencer, and thus PWM
>> >> based backlight, but we should probably use the delays in DPCD backlight
>> >> code too.
>> >
>> > This makes sense to me, you're referring to the panel delays in the VBT
>> > correct?
>>
>> Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
>> aren't applied to DPCD backlight, I think it would make sense if they
>> were.
>
> I guess it explains why it usually stops working after suspend.
> Probably BIOS doesn't re-init the power sequencer on resume.

The point is, the DPCD backlight isn't driven via the power sequencer,
while the PWM pin would be.

Please file a bug at [1], and attach /sys/kernel/debug/dri/0/i915_vbt as
well as dmesg from boot with drm.debug=14 module parameter set.

Thanks,
Jani.


[1] https://gitlab.freedesktop.org/drm/intel/issues/new



>
>> BR,
>> Jani.
>>
>> >
>> >>
>> >> BR,
>> >> Jani.
>> >>
>> >>
>> >> >
>> >> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
>> >> > ---
>> >> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
>> >> >  1 file changed, 4 insertions(+)
>> >> >
>> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > index 4f8337c7fd2e..c4f35e1b5870 100644
>> >> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> >> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
>> >> > intel_crtc_state *crtc_state,
>> >> >
>> >> >         ctrl = old_ctrl;
>> >> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
>> >> > +               /* Wait 100ms to ensure that panel is ready otherwise it
>> >> > may not
>> >> > +                * set chosen backlight level
>> >> > +                */
>> >> > +               msleep(100);
>> >> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
>> >> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
>> >> >         } else {
>> >>
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
  2021-09-15  8:47           ` [Intel-gfx] " Jani Nikula
@ 2021-09-20  6:57             ` Vasily Khoruzhick
  -1 siblings, 0 replies; 16+ messages in thread
From: Vasily Khoruzhick @ 2021-09-20  6:57 UTC (permalink / raw)
  To: Jani Nikula
  Cc: Lyude Paul, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx, dri-devel

On Wed, Sep 15, 2021 at 1:47 AM Jani Nikula <jani.nikula@linux.intel.com> wrote:
>
> On Tue, 14 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> > On Tue, Sep 14, 2021 at 3:31 PM Jani Nikula <jani.nikula@linux.intel.com> wrote:
> >>
> >> On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
> >> > On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> >> >> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> >> >> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> >> >> > control brightness, apparently needs a delay before setting brightness
> >> >> > after power on. Without this delay the panel does accept the setting
> >> >> > and may come up with some arbitrary brightness (sometimes it's too dark,
> >> >> > sometimes it's too bright, I wasn't able to find a system).
> >> >> >
> >> >> > I don't have access to the spec, so I'm not sure if it's expected
> >> >> > behavior or a quirk for particular device.
> >> >> >
> >> >> > Delay was chosen by experiment: it works with 100ms, but fails with
> >> >> > anything lower than 75ms.
> >> >>
> >> >> Looks like we don't respect the panel delays for DPCD backlight. The
> >> >> values are used for setting up the panel power sequencer, and thus PWM
> >> >> based backlight, but we should probably use the delays in DPCD backlight
> >> >> code too.
> >> >
> >> > This makes sense to me, you're referring to the panel delays in the VBT
> >> > correct?
> >>
> >> Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
> >> aren't applied to DPCD backlight, I think it would make sense if they
> >> were.
> >
> > I guess it explains why it usually stops working after suspend.
> > Probably BIOS doesn't re-init the power sequencer on resume.
>
> The point is, the DPCD backlight isn't driven via the power sequencer,
> while the PWM pin would be.
>
> Please file a bug at [1], and attach /sys/kernel/debug/dri/0/i915_vbt as
> well as dmesg from boot with drm.debug=14 module parameter set.

Done, see https://gitlab.freedesktop.org/drm/intel/-/issues/4170

> Thanks,
> Jani.
>
>
> [1] https://gitlab.freedesktop.org/drm/intel/issues/new
>
>
>
> >
> >> BR,
> >> Jani.
> >>
> >> >
> >> >>
> >> >> BR,
> >> >> Jani.
> >> >>
> >> >>
> >> >> >
> >> >> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> >> >> > ---
> >> >> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
> >> >> >  1 file changed, 4 insertions(+)
> >> >> >
> >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > index 4f8337c7fd2e..c4f35e1b5870 100644
> >> >> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
> >> >> > intel_crtc_state *crtc_state,
> >> >> >
> >> >> >         ctrl = old_ctrl;
> >> >> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
> >> >> > +               /* Wait 100ms to ensure that panel is ready otherwise it
> >> >> > may not
> >> >> > +                * set chosen backlight level
> >> >> > +                */
> >> >> > +               msleep(100);
> >> >> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
> >> >> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> >> >> >         } else {
> >> >>
> >>
> >> --
> >> Jani Nikula, Intel Open Source Graphics Center
>
> --
> Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on
@ 2021-09-20  6:57             ` Vasily Khoruzhick
  0 siblings, 0 replies; 16+ messages in thread
From: Vasily Khoruzhick @ 2021-09-20  6:57 UTC (permalink / raw)
  To: Jani Nikula
  Cc: Lyude Paul, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Sean Paul, Aaron Ma, intel-gfx, dri-devel

On Wed, Sep 15, 2021 at 1:47 AM Jani Nikula <jani.nikula@linux.intel.com> wrote:
>
> On Tue, 14 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> > On Tue, Sep 14, 2021 at 3:31 PM Jani Nikula <jani.nikula@linux.intel.com> wrote:
> >>
> >> On Tue, 14 Sep 2021, Lyude Paul <lyude@redhat.com> wrote:
> >> > On Tue, 2021-09-14 at 12:09 +0300, Jani Nikula wrote:
> >> >> On Mon, 13 Sep 2021, Vasily Khoruzhick <anarsoul@gmail.com> wrote:
> >> >> > Panel in my Dell XPS 7590, that uses Intel's HDR backlight interface to
> >> >> > control brightness, apparently needs a delay before setting brightness
> >> >> > after power on. Without this delay the panel does accept the setting
> >> >> > and may come up with some arbitrary brightness (sometimes it's too dark,
> >> >> > sometimes it's too bright, I wasn't able to find a system).
> >> >> >
> >> >> > I don't have access to the spec, so I'm not sure if it's expected
> >> >> > behavior or a quirk for particular device.
> >> >> >
> >> >> > Delay was chosen by experiment: it works with 100ms, but fails with
> >> >> > anything lower than 75ms.
> >> >>
> >> >> Looks like we don't respect the panel delays for DPCD backlight. The
> >> >> values are used for setting up the panel power sequencer, and thus PWM
> >> >> based backlight, but we should probably use the delays in DPCD backlight
> >> >> code too.
> >> >
> >> > This makes sense to me, you're referring to the panel delays in the VBT
> >> > correct?
> >>
> >> Yes. See pps_init_delays() and intel_pps_backlight_on(). The delays
> >> aren't applied to DPCD backlight, I think it would make sense if they
> >> were.
> >
> > I guess it explains why it usually stops working after suspend.
> > Probably BIOS doesn't re-init the power sequencer on resume.
>
> The point is, the DPCD backlight isn't driven via the power sequencer,
> while the PWM pin would be.
>
> Please file a bug at [1], and attach /sys/kernel/debug/dri/0/i915_vbt as
> well as dmesg from boot with drm.debug=14 module parameter set.

Done, see https://gitlab.freedesktop.org/drm/intel/-/issues/4170

> Thanks,
> Jani.
>
>
> [1] https://gitlab.freedesktop.org/drm/intel/issues/new
>
>
>
> >
> >> BR,
> >> Jani.
> >>
> >> >
> >> >>
> >> >> BR,
> >> >> Jani.
> >> >>
> >> >>
> >> >> >
> >> >> > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> >> >> > ---
> >> >> >  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++++
> >> >> >  1 file changed, 4 insertions(+)
> >> >> >
> >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > index 4f8337c7fd2e..c4f35e1b5870 100644
> >> >> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> >> >> > @@ -210,6 +210,10 @@ intel_dp_aux_hdr_enable_backlight(const struct
> >> >> > intel_crtc_state *crtc_state,
> >> >> >
> >> >> >         ctrl = old_ctrl;
> >> >> >         if (panel->backlight.edp.intel.sdr_uses_aux) {
> >> >> > +               /* Wait 100ms to ensure that panel is ready otherwise it
> >> >> > may not
> >> >> > +                * set chosen backlight level
> >> >> > +                */
> >> >> > +               msleep(100);
> >> >> >                 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE;
> >> >> >                 intel_dp_aux_hdr_set_aux_backlight(conn_state, level);
> >> >> >         } else {
> >> >>
> >>
> >> --
> >> Jani Nikula, Intel Open Source Graphics Center
>
> --
> Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2021-09-20  6:58 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-13 19:35 [PATCH] drm/i915/dp: add a delay before setting panel brightness after power on Vasily Khoruzhick
2021-09-13 19:35 ` [Intel-gfx] " Vasily Khoruzhick
2021-09-13 22:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-09-14  1:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-14  9:09 ` [PATCH] " Jani Nikula
2021-09-14  9:09   ` [Intel-gfx] " Jani Nikula
2021-09-14 21:08   ` Lyude Paul
2021-09-14 21:08     ` [Intel-gfx] " Lyude Paul
2021-09-14 22:31     ` Jani Nikula
2021-09-14 22:31       ` [Intel-gfx] " Jani Nikula
2021-09-15  1:10       ` Vasily Khoruzhick
2021-09-15  1:10         ` [Intel-gfx] " Vasily Khoruzhick
2021-09-15  8:47         ` Jani Nikula
2021-09-15  8:47           ` [Intel-gfx] " Jani Nikula
2021-09-20  6:57           ` Vasily Khoruzhick
2021-09-20  6:57             ` [Intel-gfx] " Vasily Khoruzhick

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