From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965695AbcDMG0U (ORCPT ); Wed, 13 Apr 2016 02:26:20 -0400 Received: from mail-qg0-f65.google.com ([209.85.192.65]:35447 "EHLO mail-qg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965650AbcDMG0Q (ORCPT ); Wed, 13 Apr 2016 02:26:16 -0400 MIME-Version: 1.0 In-Reply-To: <1460459243-27120-1-git-send-email-alim.akhtar@samsung.com> References: <1460459243-27120-1-git-send-email-alim.akhtar@samsung.com> Date: Wed, 13 Apr 2016 09:26:15 +0300 Message-ID: Subject: Re: [PATCH] clk: samsung: exynos7: Enable clocks for CMU_CCORE and CMU_FSYS0 blocks From: Tomasz Figa To: Alim Akhtar Cc: linux-arm-kernel , Sylwester Nawrocki , Thomas Abraham , =?UTF-8?Q?Krzysztof_Koz=C5=82owski?= , linux-kernel , "linux-samsung-soc@vger.kernel.org" , linux-clk@vger.kernel.org, Stephen Boyd , Michael Turquette Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2016-04-12 14:07 GMT+03:00 Alim Akhtar : > This patch enables clocks for CMU_CCORE and CMU_FSYS0 blocks. This is > required before accessing registers of these blocks. > > Signed-off-by: Alim Akhtar > --- > drivers/clk/samsung/clk-exynos7.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c > index ad68d46..7013aa7 100644 > --- a/drivers/clk/samsung/clk-exynos7.c > +++ b/drivers/clk/samsung/clk-exynos7.c > @@ -8,6 +8,7 @@ > * > */ > > +#include > #include > #include > > @@ -205,7 +206,11 @@ static struct samsung_cmu_info topc_cmu_info __initdata = { > > static void __init exynos7_clk_topc_init(struct device_node *np) > { > + struct clk *clk; > + > samsung_cmu_register_one(np, &topc_cmu_info); > + clk = __clk_lookup("aclk_ccore_133"); > + clk_prepare_enable(clk); Shouldn't this be rather done before calling samsung_cmu_register_one()? I don't remember exactly, but wouldn't clock registration trigger reading back current (mux, div) values from registers? Also, do we have any guarantees on order of initialization of particular CMUs? I believe this will happen in order of DT nodes and so would be not any kind of guarantee at all. Best regards, Tomasz From mboxrd@z Thu Jan 1 00:00:00 1970 From: tomasz.figa@gmail.com (Tomasz Figa) Date: Wed, 13 Apr 2016 09:26:15 +0300 Subject: [PATCH] clk: samsung: exynos7: Enable clocks for CMU_CCORE and CMU_FSYS0 blocks In-Reply-To: <1460459243-27120-1-git-send-email-alim.akhtar@samsung.com> References: <1460459243-27120-1-git-send-email-alim.akhtar@samsung.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org 2016-04-12 14:07 GMT+03:00 Alim Akhtar : > This patch enables clocks for CMU_CCORE and CMU_FSYS0 blocks. This is > required before accessing registers of these blocks. > > Signed-off-by: Alim Akhtar > --- > drivers/clk/samsung/clk-exynos7.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c > index ad68d46..7013aa7 100644 > --- a/drivers/clk/samsung/clk-exynos7.c > +++ b/drivers/clk/samsung/clk-exynos7.c > @@ -8,6 +8,7 @@ > * > */ > > +#include > #include > #include > > @@ -205,7 +206,11 @@ static struct samsung_cmu_info topc_cmu_info __initdata = { > > static void __init exynos7_clk_topc_init(struct device_node *np) > { > + struct clk *clk; > + > samsung_cmu_register_one(np, &topc_cmu_info); > + clk = __clk_lookup("aclk_ccore_133"); > + clk_prepare_enable(clk); Shouldn't this be rather done before calling samsung_cmu_register_one()? I don't remember exactly, but wouldn't clock registration trigger reading back current (mux, div) values from registers? Also, do we have any guarantees on order of initialization of particular CMUs? I believe this will happen in order of DT nodes and so would be not any kind of guarantee at all. Best regards, Tomasz