From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758967AbdAFH64 (ORCPT ); Fri, 6 Jan 2017 02:58:56 -0500 Received: from mail-qt0-f176.google.com ([209.85.216.176]:36815 "EHLO mail-qt0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753834AbdAFH6s (ORCPT ); Fri, 6 Jan 2017 02:58:48 -0500 MIME-Version: 1.0 In-Reply-To: <20170105144953.GT24225@dell> References: <1483608344-9012-1-git-send-email-benjamin.gaignard@st.com> <20170105144953.GT24225@dell> From: Benjamin Gaignard Date: Fri, 6 Jan 2017 08:58:46 +0100 Message-ID: Subject: Re: [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 To: Lee Jones Cc: robh+dt@kernel.org, Mark Rutland , Alexandre Torgue , devicetree@vger.kernel.org, Linux Kernel Mailing List , Thierry Reding , Linux PWM List , Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Fabrice Gasnier , Gerald Baeza , Arnaud Pouliquen , Linus Walleij , Linaro Kernel Mailman List , Benjamin Gaignard Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id v067x7mG028808 2017-01-05 15:49 GMT+01:00 Lee Jones : > On Thu, 05 Jan 2017, Benjamin Gaignard wrote: > >> version 7: >> - rebase on v4.10-rc2 >> - remove iio_device code from driver and keep only the trigger part >> >> version 6: >> - rename stm32-gptimer in stm32-timers. >> - change "st,stm32-gptimer" compatible to "st,stm32-timers". >> - modify "st,breakinput" parameter in pwm part. >> - split DT patch in 2 >> >> version 5: >> - fix comments done on version 4 >> - rebased on kernel 4.9-rc8 >> - change nodes names and re-order then by addresses >> >> version 4: >> - fix comments done on version 3 >> - don't use interrupts anymore in IIO timer >> - detect hardware capabilities at probe time to simplify binding >> >> version 3: >> - no change on mfd and pwm divers patches >> - add cross reference between bindings >> - change compatible to "st,stm32-timer-trigger" >> - fix attributes access rights >> - use string instead of int for master_mode and slave_mode >> - document device attributes in sysfs-bus-iio-timer-stm32 >> - update DT with the new compatible >> >> version 2: >> - keep only one compatible per driver >> - use DT parameters to describe hardware block configuration: >> - pwm channels, complementary output, counter size, break input >> - triggers accepted and create by IIO timers >> - change DT to limite use of reference to the node >> - interrupt is now in IIO timer driver >> - rename stm32-mfd-timer to stm32-timers (for general purpose timer) >> >> The following patches enable PWM and IIO Timer features for STM32 platforms. >> >> Those two features are mixed into the registers of the same hardware block >> (named general purpose timer) which lead to introduce a multifunctions driver >> on the top of them to be able to share the registers. >> >> In STM32f4 14 instances of timer hardware block exist, even if they all have >> the same register mapping they could have a different number of pwm channels >> and/or different triggers capabilities. We use various parameters in DT to >> describe the differences between hardware blocks >> >> The MFD (stm32-timers.c) takes care of clock and register mapping >> by using regmap. stm32_timers structure is provided to its sub-node to >> share those information. >> >> PWM driver is implemented into pwm-stm32.c. Depending of the instance we may >> have up to 4 channels, sometime with complementary outputs or 32 bits counter >> instead of 16 bits. Some hardware blocks may also have a break input function >> which allows to stop pwm depending of a level, defined in devicetree, on an >> external pin. >> >> IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list >> of hardware triggers usable by hardware blocks like ADC, DAC or other timers. >> >> The matrix of possible connections between blocks is quite complex so we use >> trigger names and is_stm32_iio_timer_trigger() function to be sure that >> triggers are valid and configure the IPs. >> >> At run time IIO timer hardware blocks can configure (through "master_mode" >> IIO device attribute) which internal signal (counter enable, reset, >> comparison block, etc...) is used to generate the trigger. >> >> Benjamin Gaignard (8): >> MFD: add bindings for STM32 Timers driver >> MFD: add STM32 Timers driver >> PWM: add pwm-stm32 DT bindings >> PWM: add PWM driver for STM32 plaftorm >> IIO: add bindings for STM32 timer trigger driver >> IIO: add STM32 timer trigger driver >> ARM: dts: stm32: add Timers driver for stm32f429 MCU >> ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco > > Any reason why you've dropped all your Acks? > > I don't really want to review it again if little is different. > > How much MFD related code has changed since the last review? All my apologies I forgot to add your Acks for MFD parts. Sorry for that > >> .../ABI/testing/sysfs-bus-iio-timer-stm32 | 29 ++ >> .../bindings/iio/timer/stm32-timer-trigger.txt | 23 ++ >> .../devicetree/bindings/mfd/stm32-timers.txt | 46 +++ >> .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++ >> arch/arm/boot/dts/stm32f429.dtsi | 275 +++++++++++++ >> arch/arm/boot/dts/stm32f469-disco.dts | 28 ++ >> drivers/iio/Kconfig | 1 - >> drivers/iio/trigger/Kconfig | 10 + >> drivers/iio/trigger/Makefile | 1 + >> drivers/iio/trigger/stm32-timer-trigger.c | 340 ++++++++++++++++ >> drivers/mfd/Kconfig | 11 + >> drivers/mfd/Makefile | 2 + >> drivers/mfd/stm32-timers.c | 80 ++++ >> drivers/pwm/Kconfig | 9 + >> drivers/pwm/Makefile | 1 + >> drivers/pwm/pwm-stm32.c | 434 +++++++++++++++++++++ >> include/linux/iio/timer/stm32-timer-trigger.h | 62 +++ >> include/linux/mfd/stm32-timers.h | 71 ++++ >> 18 files changed, 1455 insertions(+), 1 deletion(-) >> create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 >> create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt >> create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt >> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt >> create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c >> create mode 100644 drivers/mfd/stm32-timers.c >> create mode 100644 drivers/pwm/pwm-stm32.c >> create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h >> create mode 100644 include/linux/mfd/stm32-timers.h >> > > -- > Lee Jones > Linaro STMicroelectronics Landing Team Lead > Linaro.org │ Open source software for ARM SoCs > Follow Linaro: Facebook | Twitter | Blog -- Benjamin Gaignard Graphic Study Group Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt0-f181.google.com ([209.85.216.181]:33949 "EHLO mail-qt0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753398AbdAFH6s (ORCPT ); Fri, 6 Jan 2017 02:58:48 -0500 Received: by mail-qt0-f181.google.com with SMTP id l7so23604148qtd.1 for ; Thu, 05 Jan 2017 23:58:47 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20170105144953.GT24225@dell> References: <1483608344-9012-1-git-send-email-benjamin.gaignard@st.com> <20170105144953.GT24225@dell> From: Benjamin Gaignard Date: Fri, 6 Jan 2017 08:58:46 +0100 Message-ID: Subject: Re: [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 To: Lee Jones Cc: robh+dt@kernel.org, Mark Rutland , Alexandre Torgue , devicetree@vger.kernel.org, Linux Kernel Mailing List , Thierry Reding , Linux PWM List , Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Fabrice Gasnier , Gerald Baeza , Arnaud Pouliquen , Linus Walleij , Linaro Kernel Mailman List , Benjamin Gaignard Content-Type: text/plain; charset=UTF-8 Sender: linux-iio-owner@vger.kernel.org List-Id: linux-iio@vger.kernel.org 2017-01-05 15:49 GMT+01:00 Lee Jones : > On Thu, 05 Jan 2017, Benjamin Gaignard wrote: > >> version 7: >> - rebase on v4.10-rc2 >> - remove iio_device code from driver and keep only the trigger part >> >> version 6: >> - rename stm32-gptimer in stm32-timers. >> - change "st,stm32-gptimer" compatible to "st,stm32-timers". >> - modify "st,breakinput" parameter in pwm part. >> - split DT patch in 2 >> >> version 5: >> - fix comments done on version 4 >> - rebased on kernel 4.9-rc8 >> - change nodes names and re-order then by addresses >> >> version 4: >> - fix comments done on version 3 >> - don't use interrupts anymore in IIO timer >> - detect hardware capabilities at probe time to simplify binding >> >> version 3: >> - no change on mfd and pwm divers patches >> - add cross reference between bindings >> - change compatible to "st,stm32-timer-trigger" >> - fix attributes access rights >> - use string instead of int for master_mode and slave_mode >> - document device attributes in sysfs-bus-iio-timer-stm32 >> - update DT with the new compatible >> >> version 2: >> - keep only one compatible per driver >> - use DT parameters to describe hardware block configuration: >> - pwm channels, complementary output, counter size, break input >> - triggers accepted and create by IIO timers >> - change DT to limite use of reference to the node >> - interrupt is now in IIO timer driver >> - rename stm32-mfd-timer to stm32-timers (for general purpose timer) >> >> The following patches enable PWM and IIO Timer features for STM32 platfo= rms. >> >> Those two features are mixed into the registers of the same hardware blo= ck >> (named general purpose timer) which lead to introduce a multifunctions d= river >> on the top of them to be able to share the registers. >> >> In STM32f4 14 instances of timer hardware block exist, even if they all = have >> the same register mapping they could have a different number of pwm chan= nels >> and/or different triggers capabilities. We use various parameters in DT = to >> describe the differences between hardware blocks >> >> The MFD (stm32-timers.c) takes care of clock and register mapping >> by using regmap. stm32_timers structure is provided to its sub-node to >> share those information. >> >> PWM driver is implemented into pwm-stm32.c. Depending of the instance we= may >> have up to 4 channels, sometime with complementary outputs or 32 bits co= unter >> instead of 16 bits. Some hardware blocks may also have a break input fun= ction >> which allows to stop pwm depending of a level, defined in devicetree, on= an >> external pin. >> >> IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) defin= e a list >> of hardware triggers usable by hardware blocks like ADC, DAC or other ti= mers. >> >> The matrix of possible connections between blocks is quite complex so we= use >> trigger names and is_stm32_iio_timer_trigger() function to be sure that >> triggers are valid and configure the IPs. >> >> At run time IIO timer hardware blocks can configure (through "master_mod= e" >> IIO device attribute) which internal signal (counter enable, reset, >> comparison block, etc...) is used to generate the trigger. >> >> Benjamin Gaignard (8): >> MFD: add bindings for STM32 Timers driver >> MFD: add STM32 Timers driver >> PWM: add pwm-stm32 DT bindings >> PWM: add PWM driver for STM32 plaftorm >> IIO: add bindings for STM32 timer trigger driver >> IIO: add STM32 timer trigger driver >> ARM: dts: stm32: add Timers driver for stm32f429 MCU >> ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco > > Any reason why you've dropped all your Acks? > > I don't really want to review it again if little is different. > > How much MFD related code has changed since the last review? All my apologies I forgot to add your Acks for MFD parts. Sorry for that > >> .../ABI/testing/sysfs-bus-iio-timer-stm32 | 29 ++ >> .../bindings/iio/timer/stm32-timer-trigger.txt | 23 ++ >> .../devicetree/bindings/mfd/stm32-timers.txt | 46 +++ >> .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++ >> arch/arm/boot/dts/stm32f429.dtsi | 275 +++++++++++++ >> arch/arm/boot/dts/stm32f469-disco.dts | 28 ++ >> drivers/iio/Kconfig | 1 - >> drivers/iio/trigger/Kconfig | 10 + >> drivers/iio/trigger/Makefile | 1 + >> drivers/iio/trigger/stm32-timer-trigger.c | 340 ++++++++++++++= ++ >> drivers/mfd/Kconfig | 11 + >> drivers/mfd/Makefile | 2 + >> drivers/mfd/stm32-timers.c | 80 ++++ >> drivers/pwm/Kconfig | 9 + >> drivers/pwm/Makefile | 1 + >> drivers/pwm/pwm-stm32.c | 434 ++++++++++++++= +++++++ >> include/linux/iio/timer/stm32-timer-trigger.h | 62 +++ >> include/linux/mfd/stm32-timers.h | 71 ++++ >> 18 files changed, 1455 insertions(+), 1 deletion(-) >> create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 >> create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-ti= mer-trigger.txt >> create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.t= xt >> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt >> create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c >> create mode 100644 drivers/mfd/stm32-timers.c >> create mode 100644 drivers/pwm/pwm-stm32.c >> create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h >> create mode 100644 include/linux/mfd/stm32-timers.h >> > > -- > Lee Jones > Linaro STMicroelectronics Landing Team Lead > Linaro.org =E2=94=82 Open source software for ARM SoCs > Follow Linaro: Facebook | Twitter | Blog --=20 Benjamin Gaignard Graphic Study Group Linaro.org =E2=94=82 Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: benjamin.gaignard@linaro.org (Benjamin Gaignard) Date: Fri, 6 Jan 2017 08:58:46 +0100 Subject: [PATCH v7 0/8] Add PWM and IIO timer drivers for STM32 In-Reply-To: <20170105144953.GT24225@dell> References: <1483608344-9012-1-git-send-email-benjamin.gaignard@st.com> <20170105144953.GT24225@dell> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org 2017-01-05 15:49 GMT+01:00 Lee Jones : > On Thu, 05 Jan 2017, Benjamin Gaignard wrote: > >> version 7: >> - rebase on v4.10-rc2 >> - remove iio_device code from driver and keep only the trigger part >> >> version 6: >> - rename stm32-gptimer in stm32-timers. >> - change "st,stm32-gptimer" compatible to "st,stm32-timers". >> - modify "st,breakinput" parameter in pwm part. >> - split DT patch in 2 >> >> version 5: >> - fix comments done on version 4 >> - rebased on kernel 4.9-rc8 >> - change nodes names and re-order then by addresses >> >> version 4: >> - fix comments done on version 3 >> - don't use interrupts anymore in IIO timer >> - detect hardware capabilities at probe time to simplify binding >> >> version 3: >> - no change on mfd and pwm divers patches >> - add cross reference between bindings >> - change compatible to "st,stm32-timer-trigger" >> - fix attributes access rights >> - use string instead of int for master_mode and slave_mode >> - document device attributes in sysfs-bus-iio-timer-stm32 >> - update DT with the new compatible >> >> version 2: >> - keep only one compatible per driver >> - use DT parameters to describe hardware block configuration: >> - pwm channels, complementary output, counter size, break input >> - triggers accepted and create by IIO timers >> - change DT to limite use of reference to the node >> - interrupt is now in IIO timer driver >> - rename stm32-mfd-timer to stm32-timers (for general purpose timer) >> >> The following patches enable PWM and IIO Timer features for STM32 platforms. >> >> Those two features are mixed into the registers of the same hardware block >> (named general purpose timer) which lead to introduce a multifunctions driver >> on the top of them to be able to share the registers. >> >> In STM32f4 14 instances of timer hardware block exist, even if they all have >> the same register mapping they could have a different number of pwm channels >> and/or different triggers capabilities. We use various parameters in DT to >> describe the differences between hardware blocks >> >> The MFD (stm32-timers.c) takes care of clock and register mapping >> by using regmap. stm32_timers structure is provided to its sub-node to >> share those information. >> >> PWM driver is implemented into pwm-stm32.c. Depending of the instance we may >> have up to 4 channels, sometime with complementary outputs or 32 bits counter >> instead of 16 bits. Some hardware blocks may also have a break input function >> which allows to stop pwm depending of a level, defined in devicetree, on an >> external pin. >> >> IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list >> of hardware triggers usable by hardware blocks like ADC, DAC or other timers. >> >> The matrix of possible connections between blocks is quite complex so we use >> trigger names and is_stm32_iio_timer_trigger() function to be sure that >> triggers are valid and configure the IPs. >> >> At run time IIO timer hardware blocks can configure (through "master_mode" >> IIO device attribute) which internal signal (counter enable, reset, >> comparison block, etc...) is used to generate the trigger. >> >> Benjamin Gaignard (8): >> MFD: add bindings for STM32 Timers driver >> MFD: add STM32 Timers driver >> PWM: add pwm-stm32 DT bindings >> PWM: add PWM driver for STM32 plaftorm >> IIO: add bindings for STM32 timer trigger driver >> IIO: add STM32 timer trigger driver >> ARM: dts: stm32: add Timers driver for stm32f429 MCU >> ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco > > Any reason why you've dropped all your Acks? > > I don't really want to review it again if little is different. > > How much MFD related code has changed since the last review? All my apologies I forgot to add your Acks for MFD parts. Sorry for that > >> .../ABI/testing/sysfs-bus-iio-timer-stm32 | 29 ++ >> .../bindings/iio/timer/stm32-timer-trigger.txt | 23 ++ >> .../devicetree/bindings/mfd/stm32-timers.txt | 46 +++ >> .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++ >> arch/arm/boot/dts/stm32f429.dtsi | 275 +++++++++++++ >> arch/arm/boot/dts/stm32f469-disco.dts | 28 ++ >> drivers/iio/Kconfig | 1 - >> drivers/iio/trigger/Kconfig | 10 + >> drivers/iio/trigger/Makefile | 1 + >> drivers/iio/trigger/stm32-timer-trigger.c | 340 ++++++++++++++++ >> drivers/mfd/Kconfig | 11 + >> drivers/mfd/Makefile | 2 + >> drivers/mfd/stm32-timers.c | 80 ++++ >> drivers/pwm/Kconfig | 9 + >> drivers/pwm/Makefile | 1 + >> drivers/pwm/pwm-stm32.c | 434 +++++++++++++++++++++ >> include/linux/iio/timer/stm32-timer-trigger.h | 62 +++ >> include/linux/mfd/stm32-timers.h | 71 ++++ >> 18 files changed, 1455 insertions(+), 1 deletion(-) >> create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 >> create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt >> create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt >> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt >> create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c >> create mode 100644 drivers/mfd/stm32-timers.c >> create mode 100644 drivers/pwm/pwm-stm32.c >> create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h >> create mode 100644 include/linux/mfd/stm32-timers.h >> > > -- > Lee Jones > Linaro STMicroelectronics Landing Team Lead > Linaro.org ? Open source software for ARM SoCs > Follow Linaro: Facebook | Twitter | Blog -- Benjamin Gaignard Graphic Study Group Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog