Re: [RFC PATCH 2/4] clk: renesas: rzg2l-cpg: Add support to stack the resets instead of indexing

["Lad, Prabhakar" <prabhakar.csengg@gmail.com>]

Hi Biju,

On Fri, May 6, 2022 at 1:11 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
>
> Hi Prabhakar,
> > Subject: Re: [RFC PATCH 2/4] clk: renesas: rzg2l-cpg: Add support to stack
> > the resets instead of indexing
> >
> > Hi Biju,
> >
> > Thank you for the review.
> >
> > On Thu, May 5, 2022 at 8:48 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > >
> > > Hi Lad Prabhakar,
> > >
> > > Thanks for the patch.
> > >
> > > > Subject: [RFC PATCH 2/4] clk: renesas: rzg2l-cpg: Add support to
> > > > stack the resets instead of indexing
> > > >
> > > > Instead of indexing the resets, stack them and instead create an id
> > > > member in struct rzg2l_reset to store the index. With this approach
> > > > for every id we will have to loop through the resets array to match the
> > id.
> > > >
> > > > This in preparation to add support for Renesas RZ/Five CPG in
> > > > r9a07g043- cpg.c file where the resets array will be split up into
> > > > three i.e. common and two SoC specific.
> > > >
> > > > Signed-off-by: Lad Prabhakar
> > > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > ---
> > > >  drivers/clk/renesas/rzg2l-cpg.c | 76
> > > > ++++++++++++++++++++++++++------- drivers/clk/renesas/rzg2l-cpg.h |
> > > > 4 +-
> > > >  2 files changed, 63 insertions(+), 17 deletions(-)
> > > >
> > > > diff --git a/drivers/clk/renesas/rzg2l-cpg.c
> > > > b/drivers/clk/renesas/rzg2l- cpg.c index 1ce35f65682b..94fe307ec4c5
> > > > 100644
> > > > --- a/drivers/clk/renesas/rzg2l-cpg.c
> > > > +++ b/drivers/clk/renesas/rzg2l-cpg.c
> > > > @@ -681,14 +681,37 @@ rzg2l_cpg_register_mod_clk(const struct
> > > > rzg2l_mod_clk *mod,
> > > >
> > > >  #define rcdev_to_priv(x)     container_of(x, struct rzg2l_cpg_priv,
> > > > rcdev)
> > > >
> > > > +static const struct rzg2l_reset
> > > > +*rzg2l_get_reset_ptr(struct rzg2l_cpg_priv *priv,
> > > > +                  unsigned long id)
> > > > +
> > > > +{
> > > > +     const struct rzg2l_cpg_info *info = priv->info;
> > > > +     unsigned int i;
> > > > +
> > > > +     for (i = 0; i < priv->num_resets; i++) {
> > > > +             if (info->resets[i].id == id)
> > > > +                     return &info->resets[i];
> > > > +     }
> > >
> > > Is it not possible to use shared reset like RZ/G2L and RZ/V2L?, which
> > > has optimal memory and performance wise we can avoid bigger loop.
> > >
> > > Like adding Last index of RZ/Five as last reset index and Handle
> > > RZ/G2UL specific as invalid reset index in xlate??
> > >
> > So we will have to maintain an array id's which are invalid to RZ/Five SoC.
> > For this too we will have to loop at runtime itself. The array for invalid
> > index will be big too.
>
> As per [1], it will be 25 resets.
>
> if you invalidate RZ/G2L specific resets in probe, there is no runtime overhead.
> when a device match found, the info->reset_callback() which is mentioned in the next mail
> and invalidate the resets(resets[id].off = 0)
>
Ahh right got that. I'll wait for Geert if he has more cunning ideas.
If not I'll go with your suggested approach.

> ie,
>
> if(info->reset_callback)
>  info->reset_callback();
>
> and on r9a07g043-cpg.c, make resets[id].off = 0 to invalidate the resets.
>
OK.

> https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/tree/include/dt-bindings/clock/r9a07g043-cpg.h
>
>
Cheers,
Prabhakar