From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06581C54EAA for ; Mon, 30 Jan 2023 05:19:37 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F3D6085747; Mon, 30 Jan 2023 06:19:34 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=edgeble.ai Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=edgeble-ai.20210112.gappssmtp.com header.i=@edgeble-ai.20210112.gappssmtp.com header.b="EDRb1IfW"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 75FEF85748; Mon, 30 Jan 2023 06:19:32 +0100 (CET) Received: from mail-yb1-xb2b.google.com (mail-yb1-xb2b.google.com [IPv6:2607:f8b0:4864:20::b2b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 989D785745 for ; Mon, 30 Jan 2023 06:19:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=edgeble.ai Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jagan@edgeble.ai Received: by mail-yb1-xb2b.google.com with SMTP id e15so12629929ybn.10 for ; Sun, 29 Jan 2023 21:19:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=edgeble-ai.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=73i9j/R5eZ8yo8X4Al32Lwf80da/WgA089jxOC7gFsc=; b=EDRb1IfW63dvKCUaTjdE9Kru4KM6OCmf1ZAm9PLlprEQtLhWULAB38YRipe9f/MskB vEt0sa/UawHDvEFR85lCVc2DiIb7VOICC63YNRbMlP4jLT+Gq5al/yeL+SV18Fk4XwY4 Uei0TPpJvzZU2K8x9EI3+F9O5xSJwszbSSvQSVhlir/XPSr/tMbxi4ERCYrI5eC/4GmJ Wohg5fP/KfR0q1dyTTBh58n7eUTrV8AMHd/Oqi6C/SHyN66z4giK5gAmrTMmxzaVtznt F7zTrkt87FcB4AW68tQ6Yg8sLxTNtfvIllxN5uXOCEn+D/nrJ1jXiGtm1zPGCCH8OyJl hohw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=73i9j/R5eZ8yo8X4Al32Lwf80da/WgA089jxOC7gFsc=; b=Wy9XFHNQi2zgtlruK5OiJXwfw/BqqQEw/Sa6G5tWg7fWuMVTilMVn0FDF+OW0qP0ei gIENE3+YoGgUYu85LuwKVow6fcJ9vTpjefb6ctk1ROH2d5hXUlOQqLmq04J10fE5SY2J W31xS8jU6Y2nJzqT0R7s0UgFW0+Mtc1jjbJCGoUPFENQKFfmz2AdLWoa/K/49d8r5V/U m98zjYuUMBG/ZffpuCaJp7InGIGR1C/5jFplnJDAEyt9BVjaSkTiVZ/ks6sArQ6um2vS ZXoxU7YMUJNaM/jTC3WfScyQZffqIHBSwDt+NhltfALEbP9Fjj2fMZQcAcH0NLfBB7JD 86FQ== X-Gm-Message-State: AFqh2kriWvUTAbRKKXKDngr8GxkuAoMOjzxnKgwfFzrL1j6I2HZA7DcO PkmzJz8U4JD9xAOrFI13t90IuDcnYgNlk4t2xfBS3Q== X-Google-Smtp-Source: AMrXdXs/j/IbRpF0MJAG3VG7Ax2t2YjVo03AANwKYNdlel5/Mwkkj2gTfgPpXxLc+EN/aXrCyKAsGLdMlmAZPyJ38E8= X-Received: by 2002:a25:4d55:0:b0:7b4:fa63:5519 with SMTP id a82-20020a254d55000000b007b4fa635519mr5507144ybb.270.1675055968205; Sun, 29 Jan 2023 21:19:28 -0800 (PST) MIME-Version: 1.0 References: <20230125222741.303259-1-jagan@edgeble.ai> <2efd56b6-4dc9-cd77-3792-e60142faa6ae@kwiboo.se> <18e1e8b9-4f66-5bf0-b0a7-fb9075bb9fc5@rock-chips.com> <56319ff0-54fa-1304-44d4-bcbe4bb6e8a8@rock-chips.com> In-Reply-To: <56319ff0-54fa-1304-44d4-bcbe4bb6e8a8@rock-chips.com> From: Jagan Teki Date: Mon, 30 Jan 2023 10:49:16 +0530 Message-ID: Subject: Re: [RFC PATCH 00/16] arm: Add Rockchip RK3588 support To: Kever Yang Cc: Jonas Karlman , Simon Glass , Philipp Tomsich , fatorangecat@189.cn, u-boot@lists.denx.de Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Kever, On Mon, 30 Jan 2023 at 06:25, Kever Yang wrote: > > Hi Jonas, > > > On 2023/1/29 17:58, Jonas Karlman wrote: > > Hi Kever, > > On 2023-01-29 10:47, Kever Yang wrote: > >> Hi Jonas, Jagan, > >> > >> On 2023/1/26 06:47, Jonas Karlman wrote: > >>> Hi Jagan, > >>> > >>> On 2023-01-25 23:27, Jagan Teki wrote: > >>>> This series support Rockchip RK3588. All the device tree files are > >>>> synced from linux-next with the proper SHA1 mentioned in the commit > >>>> messages. > >>>> > >>>> Unfortunately, the BL31 from rkbin is not compatible with U-Boot so > >>>> it is failing to load ATF entry from SPL and hang. > >>>> > >>>> Verified below BL31 versions, > >>>> bl31-v1.15 > >>>> bl31-v1.21 > >>>> bl31-v1.22 > >>>> bl31-v1.23 > >>>> bl31-v1.24 > >>>> bl31-v1.25 > >>>> bl31-v1.26 > >>>> > >>>> Rever-engineered with respect to rockchip u-boot by using the same > >>>> FIT_GENERATOR being used in Mainline, rockchip u-boot is booting but > >>>> mainline showing the same issue. > >>>> > >>>> Log: > >>>> > >>>> LPDDR4X, 2112MHz01-00642-g6bdfd31756-dirty (Jan 26 2023 =EF=BF=BD=EF= =BF=BD=EF=BF=BD3:44:34 +0530) > >>>> channel[0] BW=3D16 Col=3D10 Bk=3D8 CS0 Row=3D17 CS1 Row=3D17 CS=3D2 = Die BW=3D8 Size=3D4096MB > >>>> channel[1] BW=3D16 Col=3D10 Bk=3D8 CS0 Row=3D17 CS1 Row=3D17 CS=3D2 = Die BW=3D8 Size=3D4096MB > >>>> channel[2] BW=3D16 Col=3D10 Bk=3D8 CS0 Row=3D17 CS1 Row=3D17 CS=3D2 = Die BW=3D8 Size=3D4096MB > >>>> channel[3] BW=3D16 Col=3D10 Bk=3D8 CS0 Row=3D17 CS1 Row=3D17 CS=3D2 = Die BW=3D8 Size=3D4096MB > >>>> change to F1: 528MHz > >>>> change to F2: 1068MHz > >>>> change to F3: 1560MHz > >>>> change to F0: 2112MHz > >>>> out > >>>> > >>>> U-Boot SPL 2023.01-00642-g6bdfd31756-dirty (Jan 26 2023 - 03:44:34 += 0530) > >>>> Trying to boot from MMC1 > >>>> bl31_entry: atf_entry start > >>>> << hang >> > >>>> > >>>> Any information on BL31 for RK3588 please share. > >>> I had a similar strange booing issue with RK3568 and mainline U-Boot, > >>> turned out to be related to all parts of ATF not being properly loade= d > >>> into PMU SRAM. > >> For this issue, could you try to add below property for mmc dts node? > >> > >> "u-boot,spl-fifo-mode" > >> > >> The emmc/sdmmc controller do not have a direct path to the SRAM, so we > >> can't use > >> > >> its internal DMA to do the data transfer. The "fifo-mode" will use CP= U > >> to do the data > >> > >> copy instead of the internal DMA. > > For sdmmc this worked, but for emmc it did not, trying to use the emmc = without > > SDMA seemed to cause issues reading data in general, did not fully inve= stigate why. > > > The sdmmc is using driver rockchip_dw_mmc.c while the emmc is using the > driver rockchip_sdhci.c, > > I think this is the root cause for the "spl-fifo-mode" only only works > on sdmmc. Apart from this, the 400KHZ clock workaround is required to boot the SDMMC. I feel this hack of 400KHZ cannot be proper, we need to handle that via CLK drivers to get the rate. Jagan.