From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: Re: [PATCH 03/19] drm/i915: add forcewake functions that don't touch runtime PM Date: Thu, 27 Feb 2014 11:48:30 -0300 Message-ID: References: <1387461309-2756-1-git-send-email-przanoni@gmail.com> <1387461309-2756-4-git-send-email-przanoni@gmail.com> <1393512195.3479.3.camel@intelbox> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-oa0-f53.google.com (mail-oa0-f53.google.com [209.85.219.53]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DA68105893 for ; Thu, 27 Feb 2014 06:48:33 -0800 (PST) Received: by mail-oa0-f53.google.com with SMTP id o6so2570714oag.12 for ; Thu, 27 Feb 2014 06:48:32 -0800 (PST) In-Reply-To: <1393512195.3479.3.camel@intelbox> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Imre Deak Cc: Intel Graphics Development , Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org Hi I'm sorry, I forgot to say. This series is quite old, and I changed it a little bit since then (since I found one or two problems), including this patch. I think that, to avoid wasting your time reviewing old patches, I should resend the new series. The problem is that this series should be on top of the 11 patches I recently sent (with PC8/runtime PM fixes), so if we could review those first, it would be better. We also need to decide the relative order of merging your recent series and these patches, because they have some conflicts. Thanks, Paulo 2014-02-27 11:43 GMT-03:00 Imre Deak : > On Thu, 2013-12-19 at 11:54 -0200, Paulo Zanoni wrote: >> From: Paulo Zanoni >> >> To solve a chicken-and-egg problem. Currently when we get/put >> forcewake we also get/put runtime PM and this works fine because the >> runtime PM code doesn't need forcewake. But we're going to merge PC8 >> and runtime PM into a single feature, and the PC8 code (the LCPLL >> code) does need the forcewake, so that specific piece of code needs to >> call the _no_rpm version so it doesn't try to get runtime PM in the >> code that gets runtime PM. >> >> For now the new functions are unused, we'll use them on the patch that >> merges PC8 with runtime PM. >> >> Signed-off-by: Paulo Zanoni > > Reviewed-by: Imre Deak > >> --- >> drivers/gpu/drm/i915/i915_drv.h | 4 ++++ >> drivers/gpu/drm/i915/intel_uncore.c | 30 ++++++++++++++++++++---------- >> 2 files changed, 24 insertions(+), 10 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >> index cc8afff..7f8ec08 100644 >> --- a/drivers/gpu/drm/i915/i915_drv.h >> +++ b/drivers/gpu/drm/i915/i915_drv.h >> @@ -2533,6 +2533,10 @@ extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e, >> */ >> void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_engine); >> void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine); >> +void gen6_gt_force_wake_get_no_rpm(struct drm_i915_private *dev_priv, >> + int fw_engine); >> +void gen6_gt_force_wake_put_no_rpm(struct drm_i915_private *dev_priv, >> + int fw_engine); >> >> int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val); >> int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val); >> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c >> index 646fecf..6118d2c 100644 >> --- a/drivers/gpu/drm/i915/intel_uncore.c >> +++ b/drivers/gpu/drm/i915/intel_uncore.c >> @@ -368,15 +368,11 @@ void intel_uncore_sanitize(struct drm_device *dev) >> * be called at the beginning of the sequence followed by a call to >> * gen6_gt_force_wake_put() at the end of the sequence. >> */ >> -void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_engine) >> +void gen6_gt_force_wake_get_no_rpm(struct drm_i915_private *dev_priv, >> + int fw_engine) >> { >> unsigned long irqflags; >> >> - if (!dev_priv->uncore.funcs.force_wake_get) >> - return; >> - >> - intel_runtime_pm_get(dev_priv); >> - >> /* Redirect to VLV specific routine */ >> if (IS_VALLEYVIEW(dev_priv->dev)) >> return vlv_force_wake_get(dev_priv, fw_engine); >> @@ -387,16 +383,23 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_engine) >> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); >> } >> >> +void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv, int fw_engine) >> +{ >> + if (!dev_priv->uncore.funcs.force_wake_get) >> + return; >> + >> + intel_runtime_pm_get(dev_priv); >> + gen6_gt_force_wake_get_no_rpm(dev_priv, fw_engine); >> +} >> + >> /* >> * see gen6_gt_force_wake_get() >> */ >> -void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine) >> +void gen6_gt_force_wake_put_no_rpm(struct drm_i915_private *dev_priv, >> + int fw_engine) >> { >> unsigned long irqflags; >> >> - if (!dev_priv->uncore.funcs.force_wake_put) >> - return; >> - >> /* Redirect to VLV specific routine */ >> if (IS_VALLEYVIEW(dev_priv->dev)) >> return vlv_force_wake_put(dev_priv, fw_engine); >> @@ -410,7 +413,14 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine) >> 1); >> } >> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); >> +} >> + >> +void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv, int fw_engine) >> +{ >> + if (!dev_priv->uncore.funcs.force_wake_put) >> + return; >> >> + gen6_gt_force_wake_put_no_rpm(dev_priv, fw_engine); >> intel_runtime_pm_put(dev_priv); >> } >> > -- Paulo Zanoni