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From: Paulo Zanoni <przanoni@gmail.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 28/31] drm/i915: Make Sink crc calculation waiting for counter to reset.
Date: Tue, 10 Nov 2015 18:31:48 -0200	[thread overview]
Message-ID: <CA+gsUGS5pfqDbCFoGKyv_8g9zzMN-Y1kq0JyeMqN6f-FcYVrLQ@mail.gmail.com> (raw)
In-Reply-To: <1446749423-4789-29-git-send-email-rodrigo.vivi@intel.com>

2015-11-05 16:50 GMT-02:00 Rodrigo Vivi <rodrigo.vivi@intel.com>:
> According to VESA DP spec TEST_CRC_COUNT (Bits 3:0) at
> TEST_SINK_MISC (00246h) is "Reset to 0 when TEST_SINK bit 0 = 0;
>
> So let's give few vblanks so we are really sure that this counter
> is really zeroed on the next sink_crc read.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 19 ++++++++++++++++++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index c0fa90a..5d810cd 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3806,6 +3806,8 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
>         struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
>         u8 buf;
>         int ret = 0;
> +       int count = 0;
> +       int attempts = 10;
>
>         if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) {
>                 DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
> @@ -3820,7 +3822,22 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
>                 goto out;
>         }
>
> -       intel_wait_for_vblank(dev, intel_crtc->pipe);
> +       do {
> +               intel_wait_for_vblank(dev, intel_crtc->pipe);
> +
> +               if (drm_dp_dpcd_readb(&intel_dp->aux,
> +                                     DP_TEST_SINK_MISC, &buf) < 0) {
> +                       ret = -EIO;
> +                       goto out;

This "goto out" will make sink_crc.started remain as true even though
we already sent the DPCD message telling it to stop, and it
acknowledged our message. And it won't even print stuff on dmesg. I
guess I'd probably write something on dmesg and flip started to false.

> +               }
> +               count = buf & DP_TEST_COUNT_MASK;
> +       } while (--attempts && count);
> +
> +       if (attempts == 0) {
> +               DRM_ERROR("TIMEOUT: Sink CRC counter is not zeroed\n");

The other errors are all DRM_DEBUG_KMS. On one hand we can't do
anything about them since they're most likely panel errors so
DRM_ERROR doesn't look good. On the other hand normal users are not
going to ever run this code, and DRM_ERROR may make us - and our
testing robots - notice the possible failures, so maybe DRM_ERROR is
the way to go here. Anyway, we should be consistent regardless of the
decision.

Besides, at intel_dp_sink_crc_start(), we read the last_count, but
it's supposed to be zero. Can't we use a check for this there too?
Maybe just an informative DRM_DEBUG_KMS("this was supposed to be zero
but it's not\n") without really returning.

Everything else looks good.

> +               ret = -ETIMEDOUT;
> +       }
> +
>         intel_dp->sink_crc.started = false;
>   out:
>         intel_ips_enable(intel_crtc);
> --
> 2.4.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-11-10 20:31 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-05 18:49 [PATCH 00/31] IPS/DRRS/PSR rework with PSR enabled by default Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 01/31] drm/i915: Rename IPS ready variable at pipe config Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 02/31] drm/i915: Move IPS related stuff to intel_ips.c Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 03/31] drm/i915: Add IPS DockBook Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 04/31] drm/i915: Handle actual IPS enabled state Rodrigo Vivi
2015-11-07 19:19   ` Daniel Stone
2015-11-13 18:20   ` Daniel Stone
2015-11-13 18:38     ` Ville Syrjälä
2015-11-13 18:55       ` Daniel Stone
2015-11-13 20:28         ` Ville Syrjälä
2015-11-13 21:42           ` Daniel Stone
2015-11-05 18:49 ` [PATCH 05/31] drm/i915: Fix IPS initialization Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 06/31] drm/i915: Fix IPS disable sequence Rodrigo Vivi
2015-11-10 16:34   ` Daniel Stone
2015-11-11 23:31     ` Vivi, Rodrigo
2015-11-12 11:24       ` Daniel Stone
2015-11-05 18:49 ` [PATCH 07/31] drm/i915: IPS Sysfs interface Rodrigo Vivi
2015-11-05 21:04   ` Chris Wilson
2015-11-18 10:04     ` Daniel Vetter
2015-11-18 18:32       ` Vivi, Rodrigo
2015-11-09 11:37   ` Daniel Stone
2015-11-05 18:50 ` [PATCH 08/31] drm/i915: Add psr_ready on pipe_config Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 09/31] drm/i915: Only enable DRRS if PSR won't be enabled on this pipe Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 10/31] drm/i915: Detatch i915.enable_psr from psr_ready Rodrigo Vivi
2015-11-18 10:07   ` Daniel Vetter
2015-11-18 18:35     ` Vivi, Rodrigo
2015-11-19  9:19       ` Daniel Vetter
2015-11-05 18:50 ` [PATCH 11/31] drm/i915: Use intel_crtc instead of intel_dp on PSR enable/disable functions Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 12/31] drm/i915: Fix PSR initialization Rodrigo Vivi
2015-11-18 10:12   ` Daniel Vetter
2015-11-18 18:39     ` Vivi, Rodrigo
2015-11-19  9:34       ` Daniel Vetter
2015-11-05 18:50 ` [PATCH 13/31] drm/i915: Organize Makefile new display pm group Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 14/31] drm/i915: Create intel_drrs.c Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 15/31] drm/i915: Use intel_crtc instead of intel_dp on DRRS enable/disable functions Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 16/31] drm/i915: Fix DRRS initialization Rodrigo Vivi
2015-11-18 10:13   ` Daniel Vetter
2015-11-05 18:50 ` [PATCH 17/31] drm/i915: Add sys PSR toggle interface Rodrigo Vivi
2015-11-05 21:03   ` Chris Wilson
2015-11-05 18:50 ` [PATCH 18/31] drm/i915: Force PSR exit when IRQ_HPD is detected on eDP Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 19/31] drm/i915: Remove duplicated dpcd write on hsw_psr_enable_sink Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 20/31] drm/i915: PSR: Let's rely more on frontbuffer tracking Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 21/31] drm/i915: PSR: Mask LPSP hw tracking back again Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 22/31] drm/i915: Delay first PSR activation Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 23/31] drm/i915: Reduce PSR re-activation time for VLV/CHV Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 24/31] drm/i915: PSR: Don't Skip aux handshake on DP_PSR_NO_TRAIN_ON_EXIT Rodrigo Vivi
2015-11-09 10:38   ` Jani Nikula
2015-11-10 15:41     ` Vivi, Rodrigo
2015-11-05 18:50 ` [PATCH 25/31] drm/i915: Send TP1 TP2/3 even when panel claims no NO_TRAIN_ON_EXIT Rodrigo Vivi
2015-11-09 10:39   ` Jani Nikula
2015-11-10 15:42     ` Vivi, Rodrigo
2015-11-05 18:50 ` [PATCH 26/31] drm/i915: Fix idle_frames counter Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 27/31] drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop Rodrigo Vivi
2015-11-10 20:12   ` Paulo Zanoni
2015-11-05 18:50 ` [PATCH 28/31] drm/i915: Make Sink crc calculation waiting for counter to reset Rodrigo Vivi
2015-11-10 20:31   ` Paulo Zanoni [this message]
2015-11-10 21:49     ` Paulo Zanoni
2015-11-18 10:25       ` Daniel Vetter
2015-11-18 18:42         ` Vivi, Rodrigo
2015-11-05 18:50 ` [PATCH 29/31] drm/i915: Stop tracking last calculated Sink CRC Rodrigo Vivi
2015-11-10 21:36   ` Paulo Zanoni
2015-11-05 18:50 ` [PATCH 30/31] drm/i915: Rely on TEST_SINK_START instead of tracking Sink CRC state on dev_priv Rodrigo Vivi
2015-11-10 21:44   ` Paulo Zanoni
2015-11-05 18:50 ` [PATCH 31/31] drm/i915: Enable PSR by default Rodrigo Vivi
2015-11-05 21:07   ` Chris Wilson
2015-11-05 21:30     ` Vivi, Rodrigo
2015-11-09 11:47 ` [PATCH 00/31] IPS/DRRS/PSR rework with PSR enabled " Daniel Stone
2015-11-10 15:57   ` Vivi, Rodrigo
2015-11-10 16:26     ` Daniel Stone

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