From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: Re: [PATCH 6/9] drm/i915: make intel_ddi_get_cdclk_freq return values in KHz Date: Mon, 6 May 2013 10:53:22 -0300 Message-ID: References: <1367612625-4823-1-git-send-email-przanoni@gmail.com> <1367612625-4823-7-git-send-email-przanoni@gmail.com> <20130505072025.GB15274@cantiga.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ob0-f176.google.com (mail-ob0-f176.google.com [209.85.214.176]) by gabe.freedesktop.org (Postfix) with ESMTP id C821EE6062 for ; Mon, 6 May 2013 06:53:22 -0700 (PDT) Received: by mail-ob0-f176.google.com with SMTP id er7so3092902obc.35 for ; Mon, 06 May 2013 06:53:22 -0700 (PDT) In-Reply-To: <20130505072025.GB15274@cantiga.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org 2013/5/5 Chris Wilson : > On Fri, May 03, 2013 at 05:23:42PM -0300, Paulo Zanoni wrote: >> From: Paulo Zanoni >> >> With this, that 338 can finally become the correct 337500. >> >> Due to the change we need to adjust the intel_dp_aux_ch function to >> set the correct value, so adjust the division and also use >> DIV_ROUND_CLOSEST instead of the old "round down" behavior because the >> spec says the value "should be programmed to get as close as possible >> to the ideal rate of 2MHz". > > Can you please demonstrate an instance where this code produces a > different value? And only then correct the constants. I use the 337500 value on the next patch, when setting the ips_linetime value. The correct frequency is 337500, not 338000. ips_linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, intel_ddi_get_cdclk_freq); For a mode with htotal of 2640 [0] we'll have: (i) (2640 * 1000 * 8) / 338000 = 62.48, resulting in 62 and (ii) (2640 * 1000 * 8) / 337500 = 62.57 resulting in 63. For the case inside intel_dp.c: Previously we were using 338. So with the old formula we were writing 338/2 = 169 to the register. And 337500 / 169 = 1997.04 (we use 337500 here because it's the real clock value). With the new value of 337500/2000 we'll have 168.75, which is 168 on the round-down case and 169 on the round-closest case. If we write 168 to the register, 337500 / 168 = 2008.92, and 2008.92 is more distant from 2000 than 1997.04. So with this patch we're changing the formula but still writing the same correct value to the DP AUX register. [0]: That's 1920x1080@50Hz on my DP monitor. > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre -- Paulo Zanoni