From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: MIME-Version: 1.0 In-Reply-To: <20151214014057.GM22783@voom.fritz.box> References: <561E2BE6.2090807@imgtec.com> <5628BE00.4020106@imgtec.com> <20151022115551.GI3953@io.lakedaemon.net> <56684877.3020708@imgtec.com> <56695201.2070807@imgtec.com> <20151211003902.GE20139@voom.fritz.box> <566AA9DD.6040404@imgtec.com> <20151214014057.GM22783@voom.fritz.box> Date: Thu, 17 Dec 2015 11:31:14 +0000 Message-ID: Subject: Re: Generic DT binding for IPIs From: Qais Yousef Content-Type: multipart/alternative; boundary=089e0111c0b642f36f0527165c8d To: David Gibson Cc: Qais Yousef , Rob Herring , "devicetree-spec@vger.kernel.org" , Jason Cooper , "devicetree@vger.kernel.org" , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Thomas Gleixner , Marc Zyngier , Jiang Liu , "linux-kernel@vger.kernel.org" , Lisa Parratt List-ID: --089e0111c0b642f36f0527165c8d Content-Type: text/plain; charset=UTF-8 > > Maybe it would help to look at the new IPI reservation API? > > > > https://lkml.org/lkml/2015/12/8/249 > > Hmm.. not as much as I might have hoped. > > From the API, it looks like you're reserving IPIs to signal between > different CPUs all of which are in Linux. From your description here > it sounds like the coproc is a separate specialized thing not running > Linux (or at least, not the same Linux instance as the host OS which > this device tree is for). No the CPUs aren't only Linux CPUs. It should be any CPU that the interrupt controller can talk to. That CPU can be one of Linux CPUs, or a coproc. > > I'm not sure I understood you completely but no, there's no translation > > happening. When the IPI is allocated it would be routed > > to the coproc. When the host wants to send a signal, it'll use the allocated > > hwirq value (indirectly via the virq) to write to a register, which will > > cause an interrupt to be generated at the coproc. > > Where is this magic register located? In the host cpu? In the > coproc? In some special IPI controller? The IPI controller. In my use case, the IPI controller is the same as the interrupt controller used by Linux. Generally they don't have to be the same though. > So as noted above, I'm now sure that 'interrupts' is not the right > thing. I'm trying to understand the coprocs and the ipi mechanism a > bit better to work out if there is something existing which would make > sense, or if we do need something entirely new. Let me know if I can help. Thanks, Qais --089e0111c0b642f36f0527165c8d Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
> > Maybe it would help to look = at the new IPI reservation API?
> >
> > =C2=A0 =C2=A0 https://lkml.org/lkml/2015/12/= 8/249
>
> Hmm.. not as much as I might have hoped.
><= br>> From the API, it looks like you're reserving IPIs to signal bet= ween
> different CPUs all of which are in Linux.=C2=A0 From your desc= ription here
> it sounds like the coproc is a separate specialized th= ing not running
> Linux (or at least, not the same Linux instance as = the host OS which
> this device tree is for).

No the CPU= s aren't only Linux CPUs. It should be any CPU that the interrupt contr= oller can talk to.
That CPU can be one of Linux CPUs, or a coproc.=

> > I'm not sure I unders= tood you completely but no, there's no translation
> > happeni= ng. When the IPI is allocated it would be routed
> > to the coproc= . When the host wants to send a signal, it'll use the allocated
>= > hwirq value (indirectly via the virq) to write to a register, which w= ill
> > cause an interrupt to be generated at the coproc.
><= br>> Where is this magic register located?=C2=A0 In the host cpu?=C2=A0 = In the
> coproc?=C2=A0 In some special IPI controller?

<= div>The IPI controller. In my use case, the IPI controller is the same as t= he interrupt controller used by Linux. Generally they don't have to be = the same though.

> So as noted above, I'm now sure= that 'interrupts' is not the right
> thing.=C2=A0 I'm tr= ying to understand the coprocs and the ipi mechanism a
> bit better t= o work out if there is something existing which would make
> sense, o= r if we do need something entirely new.

Let me know if I = can help.

Thanks,
Qais
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