From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sunil Kovvuri Subject: Re: [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY Date: Tue, 11 Apr 2017 22:09:39 +0530 Message-ID: References: <1491921765-29475-1-git-send-email-linucherian@gmail.com> <1491921765-29475-3-git-send-email-linucherian@gmail.com> <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Received: from mail-wm0-f50.google.com ([74.125.82.50]:35841 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751101AbdDKQjl (ORCPT ); Tue, 11 Apr 2017 12:39:41 -0400 Received: by mail-wm0-f50.google.com with SMTP id o81so68132958wmb.1 for ; Tue, 11 Apr 2017 09:39:40 -0700 (PDT) In-Reply-To: <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com> Sender: linux-acpi-owner@vger.kernel.org List-Id: linux-acpi@vger.kernel.org To: Robin Murphy Cc: linucherian@gmail.com, Catalin Marinas , Will Deacon , Lorenzo Pieralisi , hanjun.guo@linaro.org, sudeep.holla@arm.com, "Goutham, Sunil" , Geethasowjanya.Akula@cavium.com, Joerg Roedel , rjw@rjwysocki.net, robert.moore@intel.com, robert.richter@cavium.com, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, lv.zheng@intel.com, linu.cherian@cavium.com, devel@acpica.org, LAKML , lenb@kernel.org On Tue, Apr 11, 2017 at 9:13 PM, Robin Murphy wrote: > On 11/04/17 15:42, linucherian@gmail.com wrote: >> From: Linu Cherian >> >> With implementations supporting only page 0 of register space, >> resource size can be 64k as well and hence perform size checks >> based on smmu option PAGE0_REGS_ONLY. > > What harm comes of mapping page 1 if we don't access it? > > Robin. > There are multiple SMMUs on the silicon and CSRs of each SMMU are 64K apart. Hence can't map page-1 even though it's not accessed. Thanks, Sunil. From mboxrd@z Thu Jan 1 00:00:00 1970 From: sunil.kovvuri@gmail.com (Sunil Kovvuri) Date: Tue, 11 Apr 2017 22:09:39 +0530 Subject: [RFC PATCH 2/7] iommu/arm-smmu-v3: Do resource size checks based on smmu option PAGE0_REGS_ONLY In-Reply-To: <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com> References: <1491921765-29475-1-git-send-email-linucherian@gmail.com> <1491921765-29475-3-git-send-email-linucherian@gmail.com> <802c0a38-f5a6-e584-5795-42d8d3fd7603@arm.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Apr 11, 2017 at 9:13 PM, Robin Murphy wrote: > On 11/04/17 15:42, linucherian at gmail.com wrote: >> From: Linu Cherian >> >> With implementations supporting only page 0 of register space, >> resource size can be 64k as well and hence perform size checks >> based on smmu option PAGE0_REGS_ONLY. > > What harm comes of mapping page 1 if we don't access it? > > Robin. > There are multiple SMMUs on the silicon and CSRs of each SMMU are 64K apart. Hence can't map page-1 even though it's not accessed. Thanks, Sunil.