From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:54133) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uf9FG-0000Kj-IF for qemu-devel@nongnu.org; Wed, 22 May 2013 09:38:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Uf9FA-0006ox-2P for qemu-devel@nongnu.org; Wed, 22 May 2013 09:38:22 -0400 Received: from mail-oa0-f53.google.com ([209.85.219.53]:58718) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Uf9F9-0006os-S5 for qemu-devel@nongnu.org; Wed, 22 May 2013 09:38:15 -0400 Received: by mail-oa0-f53.google.com with SMTP id g12so2576724oah.26 for ; Wed, 22 May 2013 06:38:15 -0700 (PDT) MIME-Version: 1.0 Date: Wed, 22 May 2013 17:38:15 +0400 Message-ID: From: Igor Mitsyanko Content-Type: multipart/alternative; boundary=e89a8ff2511c85ac0004dd4ead6e Subject: Re: [Qemu-devel] [PATCH arm-devs v1 5/5] sd/sdhci:ADMA: fix interrupt List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.crosthwaite@xilinx.com Cc: Peter Maydell , qemu-devel@nongnu.org, edgar.iglesias@gmail.com --e89a8ff2511c85ac0004dd4ead6e Content-Type: text/plain; charset=ISO-8859-1 On 05/21/2013 10:53 AM, peter.crosthwaite@xilinx.com wrote: From: Peter Crosthwaite The end of transfer check was occurring and potentially returning before the interrupt flag was checked. This means the interrupt will be missed if it occurs on the last packet. Fix by checking for the interrupt before checking for the end of transfer. Signed-off-by: Peter Crosthwaite --- hw/sd/sdhci.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 15345dc..e64899c 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -730,6 +730,15 @@ static void sdhci_do_adma(SDHCIState *s) break; } + if (dscr.attr & SDHC_ADMA_ATTR_INT) { + DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr); + if (s->norintstsen & SDHC_NISEN_DMA) { + s->norintsts |= SDHC_NIS_DMA; + } + + sdhci_update_irq(s); + } + /* ADMA transfer terminates if blkcnt == 0 or by END attribute */ if (((s->trnmod & SDHC_TRNS_BLK_CNT_EN) && (s->blkcnt == 0)) || (dscr.attr & SDHC_ADMA_ATTR_END)) { @@ -752,15 +761,6 @@ static void sdhci_do_adma(SDHCIState *s) return; } - if (dscr.attr & SDHC_ADMA_ATTR_INT) { - DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr); - if (s->norintstsen & SDHC_NISEN_DMA) { - s->norintsts |= SDHC_NIS_DMA; - } - - sdhci_update_irq(s); - return; - } } /* we have unfinished business - reschedule to continue ADMA */ Reviewed-by: Igor Mitsyanko -- Best wishes, Igor Mitsyanko email: i.mitsyanko@gmail.com --e89a8ff2511c85ac0004dd4ead6e Content-Type: text/html; charset=ISO-8859-1

On 05/21/2013 10:53 AM, peter.crosthwaite@xilinx.com wrote:
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

The end of transfer check was occurring and potentially returning before
the interrupt flag was checked. This means the interrupt will be missed
if it occurs on the last packet. Fix by checking for the interrupt
before checking for the end of transfer.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---

 hw/sd/sdhci.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 15345dc..e64899c 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -730,6 +730,15 @@ static void sdhci_do_adma(SDHCIState *s)
             break;
         }
 
+        if (dscr.attr & SDHC_ADMA_ATTR_INT) {
+            DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr);
+            if (s->norintstsen & SDHC_NISEN_DMA) {
+                s->norintsts |= SDHC_NIS_DMA;
+            }
+
+            sdhci_update_irq(s);
+        }
+
         /* ADMA transfer terminates if blkcnt == 0 or by END attribute */
         if (((s->trnmod & SDHC_TRNS_BLK_CNT_EN) &&
                     (s->blkcnt == 0)) || (dscr.attr & SDHC_ADMA_ATTR_END)) {
@@ -752,15 +761,6 @@ static void sdhci_do_adma(SDHCIState *s)
             return;
         }
 
-        if (dscr.attr & SDHC_ADMA_ATTR_INT) {
-            DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr);
-            if (s->norintstsen & SDHC_NISEN_DMA) {
-                s->norintsts |= SDHC_NIS_DMA;
-            }
-
-            sdhci_update_irq(s);
-            return;
-        }
     }
 
     /* we have unfinished business - reschedule to continue ADMA */

Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
-- 
Best wishes,
Igor Mitsyanko
email: i.mitsyanko@gmail.com
--e89a8ff2511c85ac0004dd4ead6e--