From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4C55C48BE5 for ; Fri, 11 Jun 2021 13:35:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CBE1061076 for ; Fri, 11 Jun 2021 13:35:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229951AbhFKNg5 (ORCPT ); Fri, 11 Jun 2021 09:36:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229517AbhFKNg4 (ORCPT ); Fri, 11 Jun 2021 09:36:56 -0400 Received: from mail-oi1-x234.google.com (mail-oi1-x234.google.com [IPv6:2607:f8b0:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A41DC061574; Fri, 11 Jun 2021 06:34:46 -0700 (PDT) Received: by mail-oi1-x234.google.com with SMTP id w127so5800428oig.12; Fri, 11 Jun 2021 06:34:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=kOEeO6Yx/UUevsmguZogDl2rKUzOM84efBMRN1u0UBM=; b=KlljV5bfm99mzh/C6UvOvdMZb0DlxPHqcox+GsVlf8v7X9xGCjAmPgBkcmfzZJo6xJ NvQ3EwZiU8d/Usmk7hPaMVm943m7lnxQrgYkHpNtDsVVNVnmDd0KfxGEw7TbqSt5KMbE stm/S/UacgNolBQWl7eHLEwY9cxVLNns13Byw0FXuClvipdSnC5bJEQpEdunMzR8jbFy kbelFMCJh77IPoWaLVpbpv1yg73y91gc5FsqAr4Xqi1D9wM7QOGPbIogfP119AabYkkr vXV47Xcvl/ZFnE+TBlvcI0SOTXNk/usqwusN5xPnmhy/b3khcaip4Adi7qdJoXxBNhLK CdOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kOEeO6Yx/UUevsmguZogDl2rKUzOM84efBMRN1u0UBM=; b=NoadiIh7cXbPzXUomplPWdFXEOvsafoYHUjAaRhjG9OiLs+JDU3X4Ni3FycYm9O2MC ESWSoyUyx/0xB652LlDcgWA4DkdjYfOIyEXLxxAjJjJKltvZWLADEgZ0ggC4hFgeGWRa 4+HwtrlxYxQZECWTL5fkYM6paCmUfrp5TFffjBtgcfBjkqx+prIe5E0gthW5eIDeJuMR wsLHGAsuK/XUrZSnUXq+K7Ba2WNb4ovSxpRc6M1xqVE/ZrNExV91BpOhE++kQsXJLPSh ZhNauaFDxp9lHKT3fB+oOYosmOGxyANh4gmfIidmzyPJObgtKjJ/88x65leubsg/wb4f yxZQ== X-Gm-Message-State: AOAM531hE9lPBmfV4x1HGwhDxLVFW1dvzW+OoJG/mzHZz/NcFQrOT8PM TSUniWTfR9cKYwDrR1H2JBYS07R5Ku2NMPD+/t0= X-Google-Smtp-Source: ABdhPJzU1wpb2b19gscLn0AdCh0Hy4c1dn5bZ+kN0rwn8lJf9l3B+sNpxzGvEgfZdBEuU3uBHYqjFB+2Y5lB57oe+Dk= X-Received: by 2002:aca:3385:: with SMTP id z127mr2426897oiz.142.1623418485563; Fri, 11 Jun 2021 06:34:45 -0700 (PDT) MIME-Version: 1.0 References: <20210522211055.15988-1-mirela.rabulea@oss.nxp.com> <20210522211055.15988-3-mirela.rabulea@oss.nxp.com> In-Reply-To: From: Dong Aisheng Date: Fri, 11 Jun 2021 21:33:29 +0800 Message-ID: Subject: Re: [PATCH v13 2/2] arm64: dts: imx: Add jpeg encoder/decoder nodes To: Mirela Rabulea Cc: "linux-arm-kernel@lists.infradead.org" , "ezequiel@collabora.com" , "mchehab@kernel.org" , "shawnguo@kernel.org" , "robh+dt@kernel.org" , Aisheng Dong , "G.n. Zhou" , dl-linux-imx , "linux-kernel@vger.kernel.org" , Laurentiu Palcu , "linux-media@vger.kernel.org" , "paul.kocialkowski@bootlin.com" , "devicetree@vger.kernel.org" , Robert Chiras , "p.zabel@pengutronix.de" , Peng Fan , "hverkuil-cisco@xs4all.nl" , Daniel Baluta , "kernel@pengutronix.de" , "s.hauer@pengutronix.de" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [...] > > > +img_subsys: bus@58000000 { > > > + compatible = "simple-bus"; > > > + #address-cells = <1>; > > > + #size-cells = <1>; > > > + ranges = <0x58000000 0x0 0x58000000 0x1000000>; > > > + > > > + img_ipg_clk: clock-img-ipg { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <200000000>; > > > + clock-output-names = "img_ipg_clk"; > > > + }; > > > + > > > + jpegdec: jpegdec@58400000 { > > > > Node should be disabled by default. > > And enable it in board dts including LPCG. > > At version v5 of this patch, the node was disabled by default, and I > received this feedback from Ezequiel Garcia: > > "Pure memory-to-memory are typically not enabled per-board, but just > per-platform. > So you can drop the disabled status here." > > So, in v6 I made it enabled by default. > > Any strong reasons for enabled/disabled per platform? AFAIK we usually only enable system basic features and let other user selectable features disabled by default in dts. Even for device LPCG clocks, if it's enabled by default and later enter runtime suspend if no users, it still consumes power. Regards Aisheng > > Thanks, > Mirela > > > > > > + reg = <0x58400000 0x00050000 >; > > > + interrupts = , > > > + , > > > + , > > > + ; > > > + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > > > + clock-names = "per", "ipg"; > > > + assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > > > + assigned-clock-rates = <200000000>, <200000000>; > > > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S0>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S1>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S2>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S3>; > > > + }; > > > + > > > + jpegenc: jpegenc@58450000 { > > > > Ditto > > > > > + reg = <0x58450000 0x00050000 >; > > > + interrupts = , > > > + , > > > + , > > > + ; > > > + clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > > > + clock-names = "per", "ipg"; > > > + assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > > > + assigned-clock-rates = <200000000>, <200000000>; > > > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S0>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S1>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S2>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S3>; > > > + }; > > > + > > > + img_jpeg_dec_lpcg: clock-controller@585d0000 { > > > > Ditto > > > > > + compatible = "fsl,imx8qxp-lpcg"; > > > + reg = <0x585d0000 0x10000>; > > > + #clock-cells = <1>; > > > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > > > + clock-indices = , > > > + ; > > > + clock-output-names = "img_jpeg_dec_lpcg_clk", > > > + "img_jpeg_dec_lpcg_ipg_clk"; > > > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>; > > > + }; > > > + > > > + img_jpeg_enc_lpcg: clock-controller@585f0000 { > > > + compatible = "fsl,imx8qxp-lpcg"; > > > > Ditto > > > > Otherwise, I'm fine with this patch. > > > > > + reg = <0x585f0000 0x10000>; > > > + #clock-cells = <1>; > > > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > > > + clock-indices = , > > > + ; > > > + clock-output-names = "img_jpeg_enc_lpcg_clk", > > > + "img_jpeg_enc_lpcg_ipg_clk"; > > > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>; > > > + }; > > > +}; > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > > new file mode 100644 > > > index 000000000000..7764b4146e0a > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > > @@ -0,0 +1,12 @@ > > > +// SPDX-License-Identifier: GPL-2.0+ > > > +/* > > > + * Copyright 2021 NXP > > > + */ > > > + > > > +&jpegdec { > > > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec"; }; > > > + > > > +&jpegenc { > > > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc"; }; > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > index 12cd059b339b..aebbe2b84aa1 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > @@ -166,11 +166,13 @@ > > > }; > > > > > > /* sorted in register address */ > > > + #include "imx8-ss-img.dtsi" > > > #include "imx8-ss-dma.dtsi" > > > #include "imx8-ss-conn.dtsi" > > > #include "imx8-ss-lsio.dtsi" > > > }; > > > > > > +#include "imx8qm-ss-img.dtsi" > > > #include "imx8qm-ss-dma.dtsi" > > > #include "imx8qm-ss-conn.dtsi" > > > #include "imx8qm-ss-lsio.dtsi" > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > > new file mode 100644 > > > index 000000000000..3a087317591d > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > > @@ -0,0 +1,13 @@ > > > +// SPDX-License-Identifier: GPL-2.0+ > > > +/* > > > + * Copyright 2021 NXP > > > + * Dong Aisheng > > > + */ > > > + > > > +&jpegdec { > > > + compatible = "nxp,imx8qxp-jpgdec"; > > > +}; > > > + > > > +&jpegenc { > > > + compatible = "nxp,imx8qxp-jpgenc"; > > > +}; > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > index 1e6b4995091e..a625fb6bdc62 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > @@ -258,12 +258,14 @@ > > > }; > > > > > > /* sorted in register address */ > > > + #include "imx8-ss-img.dtsi" > > > #include "imx8-ss-adma.dtsi" > > > #include "imx8-ss-conn.dtsi" > > > #include "imx8-ss-ddr.dtsi" > > > #include "imx8-ss-lsio.dtsi" > > > }; > > > > > > +#include "imx8qxp-ss-img.dtsi" > > > #include "imx8qxp-ss-adma.dtsi" > > > #include "imx8qxp-ss-conn.dtsi" > > > #include "imx8qxp-ss-lsio.dtsi" > > > -- > > > 2.17.1 > > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44394C48BD1 for ; Fri, 11 Jun 2021 13:36:55 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0BB4B61184 for ; Fri, 11 Jun 2021 13:36:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0BB4B61184 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=m3nQHnM7LgBKi0XY8htWLE/2cqUphus84FnJBKu+OkU=; b=W4hH0A5CM4AcY5 42LE0rwjAJSzubbNrynKyvNkKyBR+IrDJlh9UO5gqliE0vxa33zw2Ho0U7atquDtOnNQE6p75IcwO 271CDYWgubK9Sg9dEyhUFqSxEM95MzRGajuPcHgEj9YsSHx4T5uM6wGfpZh2pGBHiTNZVps09icWO yuXb7dajctzoRVZDEG9ejYgad+M/BKik274HUIXq6zRjUuTPDgIbi4FgdTNaQQK/U0w0xskVnTrmq RmhFpQC2rzh0ILESeiuaUNuxUUImDesqW+qNbN+BDxHeM1O4A8uQk3R3jtR5rPUfaVXQPMcGlWEKC /vGl0EIzESDqt5MRUuew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lrhJD-005PTW-LO; Fri, 11 Jun 2021 13:34:51 +0000 Received: from mail-oi1-x22a.google.com ([2607:f8b0:4864:20::22a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lrhJ9-005PSt-SG for linux-arm-kernel@lists.infradead.org; Fri, 11 Jun 2021 13:34:49 +0000 Received: by mail-oi1-x22a.google.com with SMTP id v22so5833903oic.2 for ; Fri, 11 Jun 2021 06:34:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=kOEeO6Yx/UUevsmguZogDl2rKUzOM84efBMRN1u0UBM=; b=KlljV5bfm99mzh/C6UvOvdMZb0DlxPHqcox+GsVlf8v7X9xGCjAmPgBkcmfzZJo6xJ NvQ3EwZiU8d/Usmk7hPaMVm943m7lnxQrgYkHpNtDsVVNVnmDd0KfxGEw7TbqSt5KMbE stm/S/UacgNolBQWl7eHLEwY9cxVLNns13Byw0FXuClvipdSnC5bJEQpEdunMzR8jbFy kbelFMCJh77IPoWaLVpbpv1yg73y91gc5FsqAr4Xqi1D9wM7QOGPbIogfP119AabYkkr vXV47Xcvl/ZFnE+TBlvcI0SOTXNk/usqwusN5xPnmhy/b3khcaip4Adi7qdJoXxBNhLK CdOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kOEeO6Yx/UUevsmguZogDl2rKUzOM84efBMRN1u0UBM=; b=gVqQLjX41z1f0IYDzfeIRN+Cat4qZRRKnRHiVdkNERw/EoEfQ5EvKiEm7XWh5c5r9V ToqUJg+Anv/ZFKDFayx/cK7AP0C8SA/lTQQKz6cQ1b6CQx+SfMivNqGNONkmJCa+PTCV TlGfA/vkpFFTle2lRMGnOkEs/dYTzsePoTp+1lUw3Kr7PQ+fY2hfSjedllLJEJuXJyxQ Ktx55dIUNf+vKWSoeGtk0Jms9oxcSqrtMMjtk627UOfADnkohRVExvXcaNKwBYjosFF+ f9/nHkx6NLzK5XUY3CybkAr/a7QJOSh4OF7IaJsaUok+7XNHkbYQwf7VSwmh4/Dv8zyc AsOg== X-Gm-Message-State: AOAM532548/jgmuOEOZdmTvQpfIg2TdOb0inNosT84FZIuxUWp1f2+Fu AfYuPZOMybX4fjkxeeFvth0wQRHHTFk7GlPI9IrhfkNOzQk= X-Google-Smtp-Source: ABdhPJzU1wpb2b19gscLn0AdCh0Hy4c1dn5bZ+kN0rwn8lJf9l3B+sNpxzGvEgfZdBEuU3uBHYqjFB+2Y5lB57oe+Dk= X-Received: by 2002:aca:3385:: with SMTP id z127mr2426897oiz.142.1623418485563; Fri, 11 Jun 2021 06:34:45 -0700 (PDT) MIME-Version: 1.0 References: <20210522211055.15988-1-mirela.rabulea@oss.nxp.com> <20210522211055.15988-3-mirela.rabulea@oss.nxp.com> In-Reply-To: From: Dong Aisheng Date: Fri, 11 Jun 2021 21:33:29 +0800 Message-ID: Subject: Re: [PATCH v13 2/2] arm64: dts: imx: Add jpeg encoder/decoder nodes To: Mirela Rabulea Cc: "linux-arm-kernel@lists.infradead.org" , "ezequiel@collabora.com" , "mchehab@kernel.org" , "shawnguo@kernel.org" , "robh+dt@kernel.org" , Aisheng Dong , "G.n. Zhou" , dl-linux-imx , "linux-kernel@vger.kernel.org" , Laurentiu Palcu , "linux-media@vger.kernel.org" , "paul.kocialkowski@bootlin.com" , "devicetree@vger.kernel.org" , Robert Chiras , "p.zabel@pengutronix.de" , Peng Fan , "hverkuil-cisco@xs4all.nl" , Daniel Baluta , "kernel@pengutronix.de" , "s.hauer@pengutronix.de" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210611_063447_924430_F4A5FBDF X-CRM114-Status: GOOD ( 23.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org [...] > > > +img_subsys: bus@58000000 { > > > + compatible = "simple-bus"; > > > + #address-cells = <1>; > > > + #size-cells = <1>; > > > + ranges = <0x58000000 0x0 0x58000000 0x1000000>; > > > + > > > + img_ipg_clk: clock-img-ipg { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <200000000>; > > > + clock-output-names = "img_ipg_clk"; > > > + }; > > > + > > > + jpegdec: jpegdec@58400000 { > > > > Node should be disabled by default. > > And enable it in board dts including LPCG. > > At version v5 of this patch, the node was disabled by default, and I > received this feedback from Ezequiel Garcia: > > "Pure memory-to-memory are typically not enabled per-board, but just > per-platform. > So you can drop the disabled status here." > > So, in v6 I made it enabled by default. > > Any strong reasons for enabled/disabled per platform? AFAIK we usually only enable system basic features and let other user selectable features disabled by default in dts. Even for device LPCG clocks, if it's enabled by default and later enter runtime suspend if no users, it still consumes power. Regards Aisheng > > Thanks, > Mirela > > > > > > + reg = <0x58400000 0x00050000 >; > > > + interrupts = , > > > + , > > > + , > > > + ; > > > + clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > > > + clock-names = "per", "ipg"; > > > + assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>; > > > + assigned-clock-rates = <200000000>, <200000000>; > > > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S0>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S1>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S2>, > > > + <&pd IMX_SC_R_MJPEG_DEC_S3>; > > > + }; > > > + > > > + jpegenc: jpegenc@58450000 { > > > > Ditto > > > > > + reg = <0x58450000 0x00050000 >; > > > + interrupts = , > > > + , > > > + , > > > + ; > > > + clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > > > + clock-names = "per", "ipg"; > > > + assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>, > > > + <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>; > > > + assigned-clock-rates = <200000000>, <200000000>; > > > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S0>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S1>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S2>, > > > + <&pd IMX_SC_R_MJPEG_ENC_S3>; > > > + }; > > > + > > > + img_jpeg_dec_lpcg: clock-controller@585d0000 { > > > > Ditto > > > > > + compatible = "fsl,imx8qxp-lpcg"; > > > + reg = <0x585d0000 0x10000>; > > > + #clock-cells = <1>; > > > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > > > + clock-indices = , > > > + ; > > > + clock-output-names = "img_jpeg_dec_lpcg_clk", > > > + "img_jpeg_dec_lpcg_ipg_clk"; > > > + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>; > > > + }; > > > + > > > + img_jpeg_enc_lpcg: clock-controller@585f0000 { > > > + compatible = "fsl,imx8qxp-lpcg"; > > > > Ditto > > > > Otherwise, I'm fine with this patch. > > > > > + reg = <0x585f0000 0x10000>; > > > + #clock-cells = <1>; > > > + clocks = <&img_ipg_clk>, <&img_ipg_clk>; > > > + clock-indices = , > > > + ; > > > + clock-output-names = "img_jpeg_enc_lpcg_clk", > > > + "img_jpeg_enc_lpcg_ipg_clk"; > > > + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>; > > > + }; > > > +}; > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > > new file mode 100644 > > > index 000000000000..7764b4146e0a > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-img.dtsi > > > @@ -0,0 +1,12 @@ > > > +// SPDX-License-Identifier: GPL-2.0+ > > > +/* > > > + * Copyright 2021 NXP > > > + */ > > > + > > > +&jpegdec { > > > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgdec"; }; > > > + > > > +&jpegenc { > > > + compatible = "nxp,imx8qm-jpgdec", "nxp,imx8qxp-jpgenc"; }; > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > index 12cd059b339b..aebbe2b84aa1 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi > > > @@ -166,11 +166,13 @@ > > > }; > > > > > > /* sorted in register address */ > > > + #include "imx8-ss-img.dtsi" > > > #include "imx8-ss-dma.dtsi" > > > #include "imx8-ss-conn.dtsi" > > > #include "imx8-ss-lsio.dtsi" > > > }; > > > > > > +#include "imx8qm-ss-img.dtsi" > > > #include "imx8qm-ss-dma.dtsi" > > > #include "imx8qm-ss-conn.dtsi" > > > #include "imx8qm-ss-lsio.dtsi" > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > > new file mode 100644 > > > index 000000000000..3a087317591d > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi > > > @@ -0,0 +1,13 @@ > > > +// SPDX-License-Identifier: GPL-2.0+ > > > +/* > > > + * Copyright 2021 NXP > > > + * Dong Aisheng > > > + */ > > > + > > > +&jpegdec { > > > + compatible = "nxp,imx8qxp-jpgdec"; > > > +}; > > > + > > > +&jpegenc { > > > + compatible = "nxp,imx8qxp-jpgenc"; > > > +}; > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > index 1e6b4995091e..a625fb6bdc62 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > @@ -258,12 +258,14 @@ > > > }; > > > > > > /* sorted in register address */ > > > + #include "imx8-ss-img.dtsi" > > > #include "imx8-ss-adma.dtsi" > > > #include "imx8-ss-conn.dtsi" > > > #include "imx8-ss-ddr.dtsi" > > > #include "imx8-ss-lsio.dtsi" > > > }; > > > > > > +#include "imx8qxp-ss-img.dtsi" > > > #include "imx8qxp-ss-adma.dtsi" > > > #include "imx8qxp-ss-conn.dtsi" > > > #include "imx8qxp-ss-lsio.dtsi" > > > -- > > > 2.17.1 > > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel