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Fri, 22 Apr 2022 03:36:38 -0700 (PDT) MIME-Version: 1.0 References: <20220421102041.17345-1-johan+linaro@kernel.org> <20220421102041.17345-3-johan+linaro@kernel.org> <55d6e32b-9cf4-384c-1036-1adfb867ece8@linaro.org> In-Reply-To: From: Dmitry Baryshkov Date: Fri, 22 Apr 2022 13:36:27 +0300 Message-ID: Subject: Re: [PATCH RFC 2/5] arm64: dts: qcom: sc7280: move pipe mux handling to phy To: Johan Hovold Cc: Johan Hovold , Andy Gross , Bjorn Andersson , Lorenzo Pieralisi , Kishon Vijay Abraham I , Vinod Koul , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Prasad Malisetty , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Fri, 22 Apr 2022 at 13:07, Johan Hovold wrote: > > On Thu, Apr 21, 2022 at 01:59:04PM +0300, Dmitry Baryshkov wrote: > > On 21/04/2022 13:20, Johan Hovold wrote: > > > The QMP PHY pipe clock remuxing is part of the PHY, which is both the > > > producer and the consumer of the pipe clock. > > > > > > Update the PCIe controller and PHY node to reflect the new binding. > > > > > > Signed-off-by: Johan Hovold > > > --- > > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 18 ++++++------------ > > > 1 file changed, 6 insertions(+), 12 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > index c07765df9303..b3a9630262dc 100644 > > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > @@ -1837,11 +1837,7 @@ pcie1: pci@1c08000 { > > > <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, > > > <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; > > > > > > - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, > > > - <&gcc GCC_PCIE_1_PIPE_CLK_SRC>, > > > - <&pcie1_lane 0>, > > > - <&rpmhcc RPMH_CXO_CLK>, > > > - <&gcc GCC_PCIE_1_AUX_CLK>, > > > + clocks = <&gcc GCC_PCIE_1_AUX_CLK>, > > > <&gcc GCC_PCIE_1_CFG_AHB_CLK>, > > > <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, > > > <&gcc GCC_PCIE_1_SLV_AXI_CLK>, > > > @@ -1849,11 +1845,7 @@ pcie1: pci@1c08000 { > > > <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, > > > <&gcc GCC_DDRSS_PCIE_SF_CLK>; > > > > > > - clock-names = "pipe", > > > - "pipe_mux", > > > - "phy_pipe", > > > - "ref", > > > - "aux", > > > + clock-names = "aux", > > > "cfg", > > > "bus_master", > > > "bus_slave", > > > @@ -1910,8 +1902,10 @@ pcie1_lane: lanes@1c0e200 { > > > <0 0x01c0e600 0 0x170>, > > > <0 0x01c0e800 0 0x200>, > > > <0 0x01c0ee00 0 0xf4>; > > > - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; > > > - clock-names = "pipe0"; > > > + clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, > > > + <&gcc GCC_PCIE_1_PIPE_CLK_SRC>, > > > + <&rpmhcc RPMH_CXO_CLK>; > > > + clock-names = "pipe0", "mux", "ref"; > > > > This will not be compatible with earlier DTB files, which was a problem > > up to now. > > That depends. The above wasn't added until 5.16 so we may still be able > to fix it. That would depend on Rob/Krzyshtof. But the whole process should be described. The driver can nod depend on the clocks being there. > > The NAK you got from Rob earlier was when you removed clocks that have > been in the devicetree for several years: > > https://lore.kernel.org/all/YgQ+tGhLqwUCsTUo@robh.at.kernel.org/ > > and would still be needed by older kernels. > > Worst case, we need to keep both sets for sc7280 (i.e. like we need to > do with the pipe clocks that have been around for years). > > Johan -- With best wishes Dmitry From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A34CC433FE for ; Fri, 22 Apr 2022 10:36:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; 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Fri, 22 Apr 2022 03:36:38 -0700 (PDT) MIME-Version: 1.0 References: <20220421102041.17345-1-johan+linaro@kernel.org> <20220421102041.17345-3-johan+linaro@kernel.org> <55d6e32b-9cf4-384c-1036-1adfb867ece8@linaro.org> In-Reply-To: From: Dmitry Baryshkov Date: Fri, 22 Apr 2022 13:36:27 +0300 Message-ID: Subject: Re: [PATCH RFC 2/5] arm64: dts: qcom: sc7280: move pipe mux handling to phy To: Johan Hovold Cc: Johan Hovold , Andy Gross , Bjorn Andersson , Lorenzo Pieralisi , Kishon Vijay Abraham I , Vinod Koul , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Prasad Malisetty , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220422_033642_179173_1916F6F9 X-CRM114-Status: GOOD ( 23.30 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Fri, 22 Apr 2022 at 13:07, Johan Hovold wrote: > > On Thu, Apr 21, 2022 at 01:59:04PM +0300, Dmitry Baryshkov wrote: > > On 21/04/2022 13:20, Johan Hovold wrote: > > > The QMP PHY pipe clock remuxing is part of the PHY, which is both the > > > producer and the consumer of the pipe clock. > > > > > > Update the PCIe controller and PHY node to reflect the new binding. > > > > > > Signed-off-by: Johan Hovold > > > --- > > > arch/arm64/boot/dts/qcom/sc7280.dtsi | 18 ++++++------------ > > > 1 file changed, 6 insertions(+), 12 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > index c07765df9303..b3a9630262dc 100644 > > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > > @@ -1837,11 +1837,7 @@ pcie1: pci@1c08000 { > > > <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, > > > <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; > > > > > > - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, > > > - <&gcc GCC_PCIE_1_PIPE_CLK_SRC>, > > > - <&pcie1_lane 0>, > > > - <&rpmhcc RPMH_CXO_CLK>, > > > - <&gcc GCC_PCIE_1_AUX_CLK>, > > > + clocks = <&gcc GCC_PCIE_1_AUX_CLK>, > > > <&gcc GCC_PCIE_1_CFG_AHB_CLK>, > > > <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, > > > <&gcc GCC_PCIE_1_SLV_AXI_CLK>, > > > @@ -1849,11 +1845,7 @@ pcie1: pci@1c08000 { > > > <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, > > > <&gcc GCC_DDRSS_PCIE_SF_CLK>; > > > > > > - clock-names = "pipe", > > > - "pipe_mux", > > > - "phy_pipe", > > > - "ref", > > > - "aux", > > > + clock-names = "aux", > > > "cfg", > > > "bus_master", > > > "bus_slave", > > > @@ -1910,8 +1902,10 @@ pcie1_lane: lanes@1c0e200 { > > > <0 0x01c0e600 0 0x170>, > > > <0 0x01c0e800 0 0x200>, > > > <0 0x01c0ee00 0 0xf4>; > > > - clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; > > > - clock-names = "pipe0"; > > > + clocks = <&gcc GCC_PCIE_1_PIPE_CLK>, > > > + <&gcc GCC_PCIE_1_PIPE_CLK_SRC>, > > > + <&rpmhcc RPMH_CXO_CLK>; > > > + clock-names = "pipe0", "mux", "ref"; > > > > This will not be compatible with earlier DTB files, which was a problem > > up to now. > > That depends. The above wasn't added until 5.16 so we may still be able > to fix it. That would depend on Rob/Krzyshtof. But the whole process should be described. The driver can nod depend on the clocks being there. > > The NAK you got from Rob earlier was when you removed clocks that have > been in the devicetree for several years: > > https://lore.kernel.org/all/YgQ+tGhLqwUCsTUo@robh.at.kernel.org/ > > and would still be needed by older kernels. > > Worst case, we need to keep both sets for sc7280 (i.e. like we need to > do with the pipe clocks that have been around for years). > > Johan -- With best wishes Dmitry -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy