From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752223AbbCIRHZ (ORCPT ); Mon, 9 Mar 2015 13:07:25 -0400 Received: from mail-qc0-f182.google.com ([209.85.216.182]:41133 "EHLO mail-qc0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750963AbbCIRHW (ORCPT ); Mon, 9 Mar 2015 13:07:22 -0400 MIME-Version: 1.0 In-Reply-To: <1425912389.4871.19.camel@mtksdaap41> References: <1425638900-24989-1-git-send-email-yong.wu@mediatek.com> <1425638900-24989-3-git-send-email-yong.wu@mediatek.com> <1425912389.4871.19.camel@mtksdaap41> From: Tomasz Figa Date: Tue, 10 Mar 2015 02:00:44 +0900 Message-ID: Subject: Re: [PATCH 2/5] iommu/mediatek: Add mt8173 IOMMU driver To: Yingjoe Chen , Joerg Roedel Cc: =?UTF-8?B?WW9uZyBXdSAo5ZC05YuHKQ==?= , Mark Rutland , devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Catalin Marinas , Will Deacon , "linux-kernel@vger.kernel.org" , iommu@lists.linux-foundation.org, Rob Herring , Daniel Kurtz , Sasha Hauer , Matthias Brugger , linux-mediatek@lists.infradead.org, Robin Murphy , "linux-arm-kernel@lists.infradead.org" , Lucas Stach Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 9, 2015 at 11:46 PM, Yingjoe Chen wrote: > On Mon, 2015-03-09 at 20:11 +0900, Tomasz Figa wrote: > <...> >> > +/* >> > + * pimudev is a global var for dma_alloc_coherent. >> > + * It is not accepatable, we will delete it if "domain_alloc" is enabled >> > + */ >> > +static struct device *pimudev; >> >> This is indeed not acceptable. Could you replace dma_alloc_coherent() >> with something that doesn't require device pointer, e.g. >> alloc_pages()? (Although that would require you to handle cache >> maintenance in the driver, due to cached memory allocated.) I need to >> think about a better solution for this. > > Hi, > > For 2nd level page table, we use cached memory now. Currently we are > using __dma_flush_range to flush the cache, which is also unacceptable. > > For proper cache management, we'll need to use dma_map_single or > dma_sync_*, which still need a deivce*. Looking at how already mainlined drivers do this, they either use dmac_flush_range() (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iommu/msm_iommu.c?id=refs/tags/v4.0-rc3#n80) or directly __cpuc_flush_dcache_area() and outer_flush_range() (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iommu/rockchip-iommu.c?id=refs/tags/v4.0-rc3#n93). Joerg, what's your opinion on this? Best regards, Tomasz From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomasz Figa Subject: Re: [PATCH 2/5] iommu/mediatek: Add mt8173 IOMMU driver Date: Tue, 10 Mar 2015 02:00:44 +0900 Message-ID: References: <1425638900-24989-1-git-send-email-yong.wu@mediatek.com> <1425638900-24989-3-git-send-email-yong.wu@mediatek.com> <1425912389.4871.19.camel@mtksdaap41> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1425912389.4871.19.camel@mtksdaap41> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Yingjoe Chen , Joerg Roedel Cc: Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Catalin Marinas , Will Deacon , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, Rob Herring , Daniel Kurtz , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , Sasha Hauer , Matthias Brugger , linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, =?UTF-8?B?WW9uZyBXdSAo5ZC05YuHKQ==?= , Lucas Stach List-Id: devicetree@vger.kernel.org On Mon, Mar 9, 2015 at 11:46 PM, Yingjoe Chen wrote: > On Mon, 2015-03-09 at 20:11 +0900, Tomasz Figa wrote: > <...> >> > +/* >> > + * pimudev is a global var for dma_alloc_coherent. >> > + * It is not accepatable, we will delete it if "domain_alloc" is enabled >> > + */ >> > +static struct device *pimudev; >> >> This is indeed not acceptable. Could you replace dma_alloc_coherent() >> with something that doesn't require device pointer, e.g. >> alloc_pages()? (Although that would require you to handle cache >> maintenance in the driver, due to cached memory allocated.) I need to >> think about a better solution for this. > > Hi, > > For 2nd level page table, we use cached memory now. Currently we are > using __dma_flush_range to flush the cache, which is also unacceptable. > > For proper cache management, we'll need to use dma_map_single or > dma_sync_*, which still need a deivce*. Looking at how already mainlined drivers do this, they either use dmac_flush_range() (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iommu/msm_iommu.c?id=refs/tags/v4.0-rc3#n80) or directly __cpuc_flush_dcache_area() and outer_flush_range() (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iommu/rockchip-iommu.c?id=refs/tags/v4.0-rc3#n93). Joerg, what's your opinion on this? Best regards, Tomasz From mboxrd@z Thu Jan 1 00:00:00 1970 From: tfiga@chromium.org (Tomasz Figa) Date: Tue, 10 Mar 2015 02:00:44 +0900 Subject: [PATCH 2/5] iommu/mediatek: Add mt8173 IOMMU driver In-Reply-To: <1425912389.4871.19.camel@mtksdaap41> References: <1425638900-24989-1-git-send-email-yong.wu@mediatek.com> <1425638900-24989-3-git-send-email-yong.wu@mediatek.com> <1425912389.4871.19.camel@mtksdaap41> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Mar 9, 2015 at 11:46 PM, Yingjoe Chen wrote: > On Mon, 2015-03-09 at 20:11 +0900, Tomasz Figa wrote: > <...> >> > +/* >> > + * pimudev is a global var for dma_alloc_coherent. >> > + * It is not accepatable, we will delete it if "domain_alloc" is enabled >> > + */ >> > +static struct device *pimudev; >> >> This is indeed not acceptable. Could you replace dma_alloc_coherent() >> with something that doesn't require device pointer, e.g. >> alloc_pages()? (Although that would require you to handle cache >> maintenance in the driver, due to cached memory allocated.) I need to >> think about a better solution for this. > > Hi, > > For 2nd level page table, we use cached memory now. Currently we are > using __dma_flush_range to flush the cache, which is also unacceptable. > > For proper cache management, we'll need to use dma_map_single or > dma_sync_*, which still need a deivce*. Looking at how already mainlined drivers do this, they either use dmac_flush_range() (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iommu/msm_iommu.c?id=refs/tags/v4.0-rc3#n80) or directly __cpuc_flush_dcache_area() and outer_flush_range() (https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/iommu/rockchip-iommu.c?id=refs/tags/v4.0-rc3#n93). Joerg, what's your opinion on this? Best regards, Tomasz