From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52010) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aQa1v-0007UB-VS for qemu-devel@nongnu.org; Tue, 02 Feb 2016 07:26:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aQa1s-0005uG-Le for qemu-devel@nongnu.org; Tue, 02 Feb 2016 07:25:59 -0500 Received: from mail-yk0-x243.google.com ([2607:f8b0:4002:c07::243]:33039) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aQa1s-0005tt-BT for qemu-devel@nongnu.org; Tue, 02 Feb 2016 07:25:56 -0500 Received: by mail-yk0-x243.google.com with SMTP id r207so1730470ykd.0 for ; Tue, 02 Feb 2016 04:25:56 -0800 (PST) MIME-Version: 1.0 Sender: james@albanarts.com In-Reply-To: <1447836791-369-25-git-send-email-eblake@redhat.com> References: <1447836791-369-1-git-send-email-eblake@redhat.com> <1447836791-369-25-git-send-email-eblake@redhat.com> Date: Tue, 2 Feb 2016 12:25:55 +0000 Message-ID: From: James Hogan Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v12 24/36] cpu: Convert CpuInfo into flat union List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eric Blake Cc: Paolo Bonzini , Luiz Capitulino , qemu-devel@nongnu.org, armbru@redhat.com Hi Eric, On 18 November 2015 at 08:52, Eric Blake wrote: > +# An enumeration of cpu types that enable additional information during > +# @query-cpus. > +# > +# Since: 2.6 > +## > +{ 'enum': 'CpuInfoArch', > + 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] } > + ... > +## > +# @CpuInfo: > +# > +# Information about a virtual CPU > +# > +# Since: 0.14.0 > +## > +{ 'union': 'CpuInfo', 'base': 'CpuInfoBase', 'discriminator': 'arch', > + 'data': { 'x86': 'CpuInfoX86', > + 'sparc': 'CpuInfoSparc', > + 'ppc': 'CpuInfoPpc', > + 'mips': 'CpuInfoMips', This is causing compilation issues on MIPS, because gcc bizarrely defines mips=3D1: $ mips-img-linux-gnu-gcc -dM -E - value->u.sparc->pc =3D env->pc; info->value->u.sparc->npc =3D env->npc; #elif defined(TARGET_MIPS) - info->value->arch =3D CPU_INFO_ARCH_MIPS; - info->value->u.mips =3D g_new0(CpuInfoMIPS, 1); - info->value->u.mips->PC =3D env->active_tc.PC; + info->value->arch =3D CPU_INFO_ARCH_MIPSARCH; + info->value->u.mipsarch =3D g_new0(CpuInfoMIPS, 1); + info->value->u.mipsarch->PC =3D env->active_tc.PC; #elif defined(TARGET_TRICORE) info->value->arch =3D CPU_INFO_ARCH_TRICORE; info->value->u.tricore =3D g_new0(CpuInfoTricore, 1); diff --git a/hmp.c b/hmp.c index 54f2620690b1..e4cba874352e 100644 --- a/hmp.c +++ b/hmp.c @@ -321,8 +321,8 @@ void hmp_info_cpus(Monitor *mon, const QDict *qdict) monitor_printf(mon, " pc=3D0x%016" PRIx64, cpu->value->u.sparc-= >pc); monitor_printf(mon, " npc=3D0x%016" PRIx64, cpu->value->u.sparc= ->npc); break; - case CPU_INFO_ARCH_MIPS: - monitor_printf(mon, " PC=3D0x%016" PRIx64, cpu->value->u.mips-= >PC); + case CPU_INFO_ARCH_MIPSARCH: + monitor_printf(mon, " PC=3D0x%016" PRIx64, cpu->value->u.mipsarch->PC); break; case CPU_INFO_ARCH_TRICORE: monitor_printf(mon, " PC=3D0x%016" PRIx64, cpu->value->u.tricor= e->PC); diff --git a/qapi-schema.json b/qapi-schema.json index 8d04897922ec..c72e0615e074 100644 --- a/qapi-schema.json +++ b/qapi-schema.json @@ -750,7 +750,7 @@ # Since: 2.6 ## { 'enum': 'CpuInfoArch', - 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] } + 'data': ['x86', 'sparc', 'ppc', 'mipsarch', 'tricore', 'other' ] } ## # @CpuInfoBase: @@ -791,7 +791,7 @@ 'data': { 'x86': 'CpuInfoX86', 'sparc': 'CpuInfoSPARC', 'ppc': 'CpuInfoPPC', - 'mips': 'CpuInfoMIPS', + 'mipsarch': 'CpuInfoMIPS', 'tricore': 'CpuInfoTricore', 'other': 'CpuInfoOther' } } Cheers James