From mboxrd@z Thu Jan 1 00:00:00 1970 From: Govindraj Date: Wed, 8 Feb 2012 11:36:18 +0530 Subject: [U-Boot] [PATCH] OMAP3: TAM3517: update ehci interface In-Reply-To: <4F314459.9040300@denx.de> References: <1328342869-13347-1-git-send-email-sbabic@denx.de> <4F2FE9E1.2070601@compulab.co.il> <4F313F7D.5050902@denx.de> <4F314459.9040300@denx.de> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stefano, On Tue, Feb 7, 2012 at 9:03 PM, Stefano Babic wrote: > On 07/02/2012 16:13, Stefano Babic wrote: >> This is a strange effect. I have tested setting OMAP_EHCI_PORT_MODE_PHY >> (of course the phy is on another port), and everything works. However, >> after setting port_mode[2] to OMAP_USBHS_PORT_MODE_NONE, it does not >> work anymore and no storage are detected. I have not an explanation, >> maybe some of you can give some hints. Really, the change should have no >> effect... > > I get the cause in ehci-omap.c: > > rev = readl(&uhh->rev); > ? ?if (rev == OMAP_USBHS_REV1) { > ? ? ?if (is_ehci_phy_mode(usbhs_pdata->port_mode[0])) > ? ? ? ? ? ? ? ? clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS); > ? ? ?else > ? ? ? ? ? ? ? ?setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS); > > ? ? ?if (is_ehci_phy_mode(usbhs_pdata->port_mode[1])) > ? ? ? ? ? ? ? ?clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS); > ? ? ?else > ? ? ? ? ? ? ? ?setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS); > > ? ? ?if (is_ehci_phy_mode(usbhs_pdata->port_mode[2])) > ? ? ? ? ? ? ? ?clrbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS); > ? ? ?else > ? ? ? ? ? ? ? ?setbits_le32(®, OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS); > ? ? ? ? ? ? ? ? ? ? ? ? ^--but these should be cleared for port 0 > > So if PORT2 is set to unused, as it should be and discovered by Igor, > omap_ehci_hcd_init sets OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS against port 0. > Looks like this is copy paste error from my side, (for port2/3 it should have been bypass for port2/3 rather its port1 set in bypass mode) I will correct this part and repost the patch. Thanks for catching this. -- Thanks, Govindraj.R